102 static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned int gpio_num)  in sch_gpio_direction_in()  argument
108 	sch_gpio_reg_set(sch, gpio_num, GIO, 1);  in sch_gpio_direction_in()
113 static int sch_gpio_get(struct gpio_chip *gc, unsigned int gpio_num)  in sch_gpio_get()  argument
117 	return sch_gpio_reg_get(sch, gpio_num, GLV);  in sch_gpio_get()
120 static void sch_gpio_set(struct gpio_chip *gc, unsigned int gpio_num, int val)  in sch_gpio_set()  argument
126 	sch_gpio_reg_set(sch, gpio_num, GLV, val);  in sch_gpio_set()
130 static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned int gpio_num,  in sch_gpio_direction_out()  argument
137 	sch_gpio_reg_set(sch, gpio_num, GIO, 0);  in sch_gpio_direction_out()
149 	sch_gpio_set(gc, gpio_num, val);  in sch_gpio_direction_out()
153 static int sch_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio_num)  in sch_gpio_get_direction()  argument
157 	if (sch_gpio_reg_get(sch, gpio_num, GIO))  in sch_gpio_get_direction()
177 	irq_hw_number_t gpio_num = irqd_to_hwirq(d);  in sch_irq_type()  local
200 	sch_gpio_reg_set(sch, gpio_num, GTPE, rising);  in sch_irq_type()
201 	sch_gpio_reg_set(sch, gpio_num, GTNE, falling);  in sch_irq_type()
214 	irq_hw_number_t gpio_num = irqd_to_hwirq(d);  in sch_irq_ack()  local
218 	sch_gpio_reg_set(sch, gpio_num, GTS, 1);  in sch_irq_ack()
222 static void sch_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t gpio_num, int val)  in sch_irq_mask_unmask()  argument
228 	sch_gpio_reg_set(sch, gpio_num, GGPE, val);  in sch_irq_mask_unmask()
235 	irq_hw_number_t gpio_num = irqd_to_hwirq(d);  in sch_irq_mask()  local
237 	sch_irq_mask_unmask(gc, gpio_num, 0);  in sch_irq_mask()
238 	gpiochip_disable_irq(gc, gpio_num);  in sch_irq_mask()
244 	irq_hw_number_t gpio_num = irqd_to_hwirq(d);  in sch_irq_unmask()  local
246 	gpiochip_enable_irq(gc, gpio_num);  in sch_irq_unmask()
247 	sch_irq_mask_unmask(gc, gpio_num, 1);  in sch_irq_unmask()