114 static void sa1100_update_edge_regs(struct sa1100_gpio_chip *sgc)  in sa1100_update_edge_regs()  argument
116 	void *base = sgc->membase;  in sa1100_update_edge_regs()
119 	grer = sgc->irqrising & sgc->irqmask;  in sa1100_update_edge_regs()
120 	gfer = sgc->irqfalling & sgc->irqmask;  in sa1100_update_edge_regs()
128 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_type()  local
132 		if ((sgc->irqrising | sgc->irqfalling) & mask)  in sa1100_gpio_type()
138 		sgc->irqrising |= mask;  in sa1100_gpio_type()
140 		sgc->irqrising &= ~mask;  in sa1100_gpio_type()
142 		sgc->irqfalling |= mask;  in sa1100_gpio_type()
144 		sgc->irqfalling &= ~mask;  in sa1100_gpio_type()
146 	sa1100_update_edge_regs(sgc);  in sa1100_gpio_type()
156 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_ack()  local
158 	writel_relaxed(BIT(d->hwirq), sgc->membase + R_GEDR);  in sa1100_gpio_ack()
163 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_mask()  local
166 	sgc->irqmask &= ~mask;  in sa1100_gpio_mask()
168 	sa1100_update_edge_regs(sgc);  in sa1100_gpio_mask()
173 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_unmask()  local
176 	sgc->irqmask |= mask;  in sa1100_gpio_unmask()
178 	sa1100_update_edge_regs(sgc);  in sa1100_gpio_unmask()
183 	struct sa1100_gpio_chip *sgc = irq_data_get_irq_chip_data(d);  in sa1100_gpio_wake()  local
187 			sgc->irqwake |= BIT(d->hwirq);  in sa1100_gpio_wake()
189 			sgc->irqwake &= ~BIT(d->hwirq);  in sa1100_gpio_wake()
209 	struct sa1100_gpio_chip *sgc = d->host_data;  in sa1100_gpio_irqdomain_map()  local
211 	irq_set_chip_data(irq, sgc);  in sa1100_gpio_irqdomain_map()
232 	struct sa1100_gpio_chip *sgc = irq_desc_get_handler_data(desc);  in sa1100_gpio_handler()  local
234 	void __iomem *gedr = sgc->membase + R_GEDR;  in sa1100_gpio_handler()
244 		irq = sgc->irqbase;  in sa1100_gpio_handler()
258 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_gpio_suspend()  local
263 	writel_relaxed(sgc->irqwake & sgc->irqrising, sgc->membase + R_GRER);  in sa1100_gpio_suspend()
264 	writel_relaxed(sgc->irqwake & sgc->irqfalling, sgc->membase + R_GFER);  in sa1100_gpio_suspend()
269 	writel_relaxed(readl_relaxed(sgc->membase + R_GEDR),  in sa1100_gpio_suspend()
270 		       sgc->membase + R_GEDR);  in sa1100_gpio_suspend()
312 	struct sa1100_gpio_chip *sgc = &sa1100_gpio_chip;  in sa1100_init_gpio()  local
316 	writel_relaxed(0, sgc->membase + R_GFER);  in sa1100_init_gpio()
317 	writel_relaxed(0, sgc->membase + R_GRER);  in sa1100_init_gpio()
318 	writel_relaxed(-1, sgc->membase + R_GEDR);  in sa1100_init_gpio()
324 			&sa1100_gpio_irqdomain_ops, sgc);  in sa1100_init_gpio()
328 						 sa1100_gpio_handler, sgc);  in sa1100_init_gpio()