Lines Matching +full:mmp +full:- +full:gpio
1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/plat-pxa/gpio.c
5 * Generic PXA GPIO handling
14 #include <linux/gpio/driver.h>
15 #include <linux/gpio-pxa.h>
33 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
34 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
35 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
37 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
38 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
39 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
41 * BANK 6 - 0x0200 0x020C 0x0218 0x0224 0x0230 0x023C 0x0248
57 #define ED_MASK_OFFSET 0x9C /* GPIO edge detection for AP side */
86 int (*set_wake)(unsigned int gpio, unsigned int on);
150 for (i = 0, b = pc->banks; i <= pxa_last_gpio; i += 32, b++)
159 static inline void __iomem *gpio_bank_base(struct gpio_chip *c, int gpio) in gpio_bank_base() argument
162 struct pxa_gpio_bank *bank = p->banks + (gpio / 32); in gpio_bank_base()
164 return bank->regbase; in gpio_bank_base()
168 unsigned gpio) in gpio_to_pxabank() argument
170 return chip_to_pxachip(c)->banks + gpio / 32; in gpio_to_pxabank()
179 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
181 static inline int __gpio_is_inverted(int gpio) in __gpio_is_inverted() argument
183 if ((gpio_type == PXA26X_GPIO) && (gpio > 85)) in __gpio_is_inverted()
190 * function of a GPIO, and GPDRx cannot be altered once configured. It
192 * accurate, you are welcome to propose a better one :-)
194 static inline int __gpio_is_occupied(struct pxa_gpio_chip *pchip, unsigned gpio) in __gpio_is_occupied() argument
200 base = gpio_bank_base(&pchip->chip, gpio); in __gpio_is_occupied()
208 af = (gafr >> ((gpio & 0xf) * 2)) & 0x3; in __gpio_is_occupied()
209 dir = gpdr & GPIO_bit(gpio); in __gpio_is_occupied()
211 if (__gpio_is_inverted(gpio)) in __gpio_is_occupied()
217 ret = gpdr & GPIO_bit(gpio); in __gpio_is_occupied()
228 irq_gpio0 = irq_find_mapping(pchip->irqdomain, 0); in pxa_irq_to_gpio()
230 return irq - irq_gpio0; in pxa_irq_to_gpio()
252 return irq_find_mapping(pchip->irqdomain, offset); in pxa_gpio_to_irq()
271 if (__gpio_is_inverted(chip->base + offset)) in pxa_gpio_direction_input()
300 if (__gpio_is_inverted(chip->base + offset)) in pxa_gpio_direction_output()
331 if (gpiospec->args[0] > pxa_last_gpio) in pxa_gpio_of_xlate()
332 return -EINVAL; in pxa_gpio_of_xlate()
335 *flags = gpiospec->args[1]; in pxa_gpio_of_xlate()
337 return gpiospec->args[0]; in pxa_gpio_of_xlate()
343 int i, gpio, nbanks = DIV_ROUND_UP(ngpio, 32); in pxa_init_gpio_chip() local
346 pchip->banks = devm_kcalloc(pchip->dev, nbanks, sizeof(*pchip->banks), in pxa_init_gpio_chip()
348 if (!pchip->banks) in pxa_init_gpio_chip()
349 return -ENOMEM; in pxa_init_gpio_chip()
351 pchip->chip.parent = pchip->dev; in pxa_init_gpio_chip()
352 pchip->chip.label = "gpio-pxa"; in pxa_init_gpio_chip()
353 pchip->chip.direction_input = pxa_gpio_direction_input; in pxa_init_gpio_chip()
354 pchip->chip.direction_output = pxa_gpio_direction_output; in pxa_init_gpio_chip()
355 pchip->chip.get = pxa_gpio_get; in pxa_init_gpio_chip()
356 pchip->chip.set = pxa_gpio_set; in pxa_init_gpio_chip()
357 pchip->chip.to_irq = pxa_gpio_to_irq; in pxa_init_gpio_chip()
358 pchip->chip.ngpio = ngpio; in pxa_init_gpio_chip()
359 pchip->chip.request = gpiochip_generic_request; in pxa_init_gpio_chip()
360 pchip->chip.free = gpiochip_generic_free; in pxa_init_gpio_chip()
363 pchip->chip.of_xlate = pxa_gpio_of_xlate; in pxa_init_gpio_chip()
364 pchip->chip.of_gpio_n_cells = 2; in pxa_init_gpio_chip()
367 for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) { in pxa_init_gpio_chip()
368 bank = pchip->banks + i; in pxa_init_gpio_chip()
369 bank->regbase = regbase + BANK_OFF(i); in pxa_init_gpio_chip()
372 return gpiochip_add_data(&pchip->chip, pchip); in pxa_init_gpio_chip()
376 * bits are set in c->irq_mask
382 grer = readl_relaxed(c->regbase + GRER_OFFSET) & ~c->irq_mask; in update_edge_detect()
383 gfer = readl_relaxed(c->regbase + GFER_OFFSET) & ~c->irq_mask; in update_edge_detect()
384 grer |= c->irq_edge_rise & c->irq_mask; in update_edge_detect()
385 gfer |= c->irq_edge_fall & c->irq_mask; in update_edge_detect()
386 writel_relaxed(grer, c->regbase + GRER_OFFSET); in update_edge_detect()
387 writel_relaxed(gfer, c->regbase + GFER_OFFSET); in update_edge_detect()
393 unsigned int gpio = irqd_to_hwirq(d); in pxa_gpio_irq_type() local
394 struct pxa_gpio_bank *c = gpio_to_pxabank(&pchip->chip, gpio); in pxa_gpio_irq_type()
395 unsigned long gpdr, mask = GPIO_bit(gpio); in pxa_gpio_irq_type()
401 if ((c->irq_edge_rise | c->irq_edge_fall) & GPIO_bit(gpio)) in pxa_gpio_irq_type()
404 if (__gpio_is_occupied(pchip, gpio)) in pxa_gpio_irq_type()
410 gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
412 if (__gpio_is_inverted(gpio)) in pxa_gpio_irq_type()
413 writel_relaxed(gpdr | mask, c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
415 writel_relaxed(gpdr & ~mask, c->regbase + GPDR_OFFSET); in pxa_gpio_irq_type()
418 c->irq_edge_rise |= mask; in pxa_gpio_irq_type()
420 c->irq_edge_rise &= ~mask; in pxa_gpio_irq_type()
423 c->irq_edge_fall |= mask; in pxa_gpio_irq_type()
425 c->irq_edge_fall &= ~mask; in pxa_gpio_irq_type()
429 pr_debug("%s: IRQ%d (GPIO%d) - edge%s%s\n", __func__, d->irq, gpio, in pxa_gpio_irq_type()
437 int loop, gpio, n, handled = 0; in pxa_gpio_demux_handler() local
444 for_each_gpio_bank(gpio, c, pchip) { in pxa_gpio_demux_handler()
445 gedr = readl_relaxed(c->regbase + GEDR_OFFSET); in pxa_gpio_demux_handler()
446 gedr = gedr & c->irq_mask; in pxa_gpio_demux_handler()
447 writel_relaxed(gedr, c->regbase + GEDR_OFFSET); in pxa_gpio_demux_handler()
452 generic_handle_domain_irq(pchip->irqdomain, in pxa_gpio_demux_handler()
453 gpio + n); in pxa_gpio_demux_handler()
466 if (in_irq == pchip->irq0) { in pxa_gpio_direct_handler()
467 generic_handle_domain_irq(pchip->irqdomain, 0); in pxa_gpio_direct_handler()
468 } else if (in_irq == pchip->irq1) { in pxa_gpio_direct_handler()
469 generic_handle_domain_irq(pchip->irqdomain, 1); in pxa_gpio_direct_handler()
480 unsigned int gpio = irqd_to_hwirq(d); in pxa_ack_muxed_gpio() local
481 void __iomem *base = gpio_bank_base(&pchip->chip, gpio); in pxa_ack_muxed_gpio()
483 writel_relaxed(GPIO_bit(gpio), base + GEDR_OFFSET); in pxa_ack_muxed_gpio()
489 unsigned int gpio = irqd_to_hwirq(d); in pxa_mask_muxed_gpio() local
490 struct pxa_gpio_bank *b = gpio_to_pxabank(&pchip->chip, gpio); in pxa_mask_muxed_gpio()
491 void __iomem *base = gpio_bank_base(&pchip->chip, gpio); in pxa_mask_muxed_gpio()
494 b->irq_mask &= ~GPIO_bit(gpio); in pxa_mask_muxed_gpio()
496 grer = readl_relaxed(base + GRER_OFFSET) & ~GPIO_bit(gpio); in pxa_mask_muxed_gpio()
497 gfer = readl_relaxed(base + GFER_OFFSET) & ~GPIO_bit(gpio); in pxa_mask_muxed_gpio()
505 unsigned int gpio = irqd_to_hwirq(d); in pxa_gpio_set_wake() local
507 if (pchip->set_wake) in pxa_gpio_set_wake()
508 return pchip->set_wake(gpio, on); in pxa_gpio_set_wake()
516 unsigned int gpio = irqd_to_hwirq(d); in pxa_unmask_muxed_gpio() local
517 struct pxa_gpio_bank *c = gpio_to_pxabank(&pchip->chip, gpio); in pxa_unmask_muxed_gpio()
519 c->irq_mask |= GPIO_bit(gpio); in pxa_unmask_muxed_gpio()
524 .name = "GPIO",
535 struct pxa_gpio_id *pxa_id = (struct pxa_gpio_id *)id->driver_data; in pxa_gpio_nums()
538 switch (pxa_id->type) { in pxa_gpio_nums()
547 gpio_type = pxa_id->type; in pxa_gpio_nums()
548 count = pxa_id->gpio_nums - 1; in pxa_gpio_nums()
551 count = -EINVAL; in pxa_gpio_nums()
562 irq_set_chip_data(irq, d->host_data); in pxa_irq_domain_map()
574 { .compatible = "intel,pxa25x-gpio", .data = &pxa25x_id, },
575 { .compatible = "intel,pxa26x-gpio", .data = &pxa26x_id, },
576 { .compatible = "intel,pxa27x-gpio", .data = &pxa27x_id, },
577 { .compatible = "intel,pxa3xx-gpio", .data = &pxa3xx_id, },
578 { .compatible = "marvell,pxa93x-gpio", .data = &pxa93x_id, },
579 { .compatible = "marvell,mmp-gpio", .data = &mmp_id, },
580 { .compatible = "marvell,mmp2-gpio", .data = &mmp2_id, },
581 { .compatible = "marvell,pxa1928-gpio", .data = &pxa1928_id, },
591 gpio_id = of_device_get_match_data(&pdev->dev); in pxa_gpio_probe_dt()
592 gpio_type = gpio_id->type; in pxa_gpio_probe_dt()
594 nr_gpios = gpio_id->gpio_nums; in pxa_gpio_probe_dt()
595 pxa_last_gpio = nr_gpios - 1; in pxa_gpio_probe_dt()
597 irq_base = devm_irq_alloc_descs(&pdev->dev, -1, 0, nr_gpios, 0); in pxa_gpio_probe_dt()
599 dev_err(&pdev->dev, "Failed to allocate IRQ numbers\n"); in pxa_gpio_probe_dt()
605 #define pxa_gpio_probe_dt(pdev, pchip) (-1)
615 int gpio, ret; in pxa_gpio_probe() local
618 pchip = devm_kzalloc(&pdev->dev, sizeof(*pchip), GFP_KERNEL); in pxa_gpio_probe()
620 return -ENOMEM; in pxa_gpio_probe()
621 pchip->dev = &pdev->dev; in pxa_gpio_probe()
623 info = dev_get_platdata(&pdev->dev); in pxa_gpio_probe()
625 irq_base = info->irq_base; in pxa_gpio_probe()
627 return -EINVAL; in pxa_gpio_probe()
629 pchip->set_wake = info->gpio_set_wake; in pxa_gpio_probe()
633 return -EINVAL; in pxa_gpio_probe()
637 return -EINVAL; in pxa_gpio_probe()
639 pchip->irqdomain = irq_domain_add_legacy(pdev->dev.of_node, in pxa_gpio_probe()
642 if (!pchip->irqdomain) in pxa_gpio_probe()
643 return -ENOMEM; in pxa_gpio_probe()
650 return -EINVAL; in pxa_gpio_probe()
652 pchip->irq0 = irq0; in pxa_gpio_probe()
653 pchip->irq1 = irq1; in pxa_gpio_probe()
659 clk = devm_clk_get_enabled(&pdev->dev, NULL); in pxa_gpio_probe()
661 dev_err(&pdev->dev, "Error %ld to get gpio clock\n", in pxa_gpio_probe()
666 /* Initialize GPIO chips */ in pxa_gpio_probe()
671 /* clear all GPIO edge detects */ in pxa_gpio_probe()
672 for_each_gpio_bank(gpio, c, pchip) { in pxa_gpio_probe()
673 writel_relaxed(0, c->regbase + GFER_OFFSET); in pxa_gpio_probe()
674 writel_relaxed(0, c->regbase + GRER_OFFSET); in pxa_gpio_probe()
675 writel_relaxed(~0, c->regbase + GEDR_OFFSET); in pxa_gpio_probe()
676 /* unmask GPIO edge detect for AP side */ in pxa_gpio_probe()
678 writel_relaxed(~0, c->regbase + ED_MASK_OFFSET); in pxa_gpio_probe()
682 ret = devm_request_irq(&pdev->dev, in pxa_gpio_probe()
684 "gpio-0", pchip); in pxa_gpio_probe()
686 dev_err(&pdev->dev, "request of gpio0 irq failed: %d\n", in pxa_gpio_probe()
690 ret = devm_request_irq(&pdev->dev, in pxa_gpio_probe()
692 "gpio-1", pchip); in pxa_gpio_probe()
694 dev_err(&pdev->dev, "request of gpio1 irq failed: %d\n", in pxa_gpio_probe()
697 ret = devm_request_irq(&pdev->dev, in pxa_gpio_probe()
699 "gpio-mux", pchip); in pxa_gpio_probe()
701 dev_err(&pdev->dev, "request of gpio-mux irq failed: %d\n", in pxa_gpio_probe()
710 { "pxa25x-gpio", (unsigned long)&pxa25x_id },
711 { "pxa26x-gpio", (unsigned long)&pxa26x_id },
712 { "pxa27x-gpio", (unsigned long)&pxa27x_id },
713 { "pxa3xx-gpio", (unsigned long)&pxa3xx_id },
714 { "pxa93x-gpio", (unsigned long)&pxa93x_id },
715 { "mmp-gpio", (unsigned long)&mmp_id },
716 { "mmp2-gpio", (unsigned long)&mmp2_id },
717 { "pxa1928-gpio", (unsigned long)&pxa1928_id },
724 .name = "pxa-gpio",
753 int gpio; in pxa_gpio_suspend() local
758 for_each_gpio_bank(gpio, c, pchip) { in pxa_gpio_suspend()
759 c->saved_gplr = readl_relaxed(c->regbase + GPLR_OFFSET); in pxa_gpio_suspend()
760 c->saved_gpdr = readl_relaxed(c->regbase + GPDR_OFFSET); in pxa_gpio_suspend()
761 c->saved_grer = readl_relaxed(c->regbase + GRER_OFFSET); in pxa_gpio_suspend()
762 c->saved_gfer = readl_relaxed(c->regbase + GFER_OFFSET); in pxa_gpio_suspend()
764 /* Clear GPIO transition detect bits */ in pxa_gpio_suspend()
765 writel_relaxed(0xffffffff, c->regbase + GEDR_OFFSET); in pxa_gpio_suspend()
774 int gpio; in pxa_gpio_resume() local
779 for_each_gpio_bank(gpio, c, pchip) { in pxa_gpio_resume()
781 writel_relaxed(c->saved_gplr, c->regbase + GPSR_OFFSET); in pxa_gpio_resume()
782 writel_relaxed(~c->saved_gplr, c->regbase + GPCR_OFFSET); in pxa_gpio_resume()
784 writel_relaxed(c->saved_grer, c->regbase + GRER_OFFSET); in pxa_gpio_resume()
785 writel_relaxed(c->saved_gfer, c->regbase + GFER_OFFSET); in pxa_gpio_resume()
786 writel_relaxed(c->saved_gpdr, c->regbase + GPDR_OFFSET); in pxa_gpio_resume()