59 	u32 offset;  member
65 static void sprd_pmic_eic_update(struct gpio_chip *chip, unsigned int offset,  in sprd_pmic_eic_update()  argument
69 	u32 shift = SPRD_PMIC_EIC_BIT(offset);  in sprd_pmic_eic_update()
71 	regmap_update_bits(pmic_eic->map, pmic_eic->offset + reg,  in sprd_pmic_eic_update()
75 static int sprd_pmic_eic_read(struct gpio_chip *chip, unsigned int offset,  in sprd_pmic_eic_read()  argument
82 	ret = regmap_read(pmic_eic->map, pmic_eic->offset + reg, &value);  in sprd_pmic_eic_read()
86 	return !!(value & BIT(SPRD_PMIC_EIC_BIT(offset)));  in sprd_pmic_eic_read()
89 static int sprd_pmic_eic_request(struct gpio_chip *chip, unsigned int offset)  in sprd_pmic_eic_request()  argument
91 	sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_DMSK, 1);  in sprd_pmic_eic_request()
95 static void sprd_pmic_eic_free(struct gpio_chip *chip, unsigned int offset)  in sprd_pmic_eic_free()  argument
97 	sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_DMSK, 0);  in sprd_pmic_eic_free()
100 static int sprd_pmic_eic_get(struct gpio_chip *chip, unsigned int offset)  in sprd_pmic_eic_get()  argument
102 	return sprd_pmic_eic_read(chip, offset, SPRD_PMIC_EIC_DATA);  in sprd_pmic_eic_get()
106 					 unsigned int offset)  in sprd_pmic_eic_direction_input()  argument
113 				      unsigned int offset,  in sprd_pmic_eic_set_debounce()  argument
120 	reg = SPRD_PMIC_EIC_CTRL0 + SPRD_PMIC_EIC_BIT(offset) * 0x4;  in sprd_pmic_eic_set_debounce()
121 	ret = regmap_read(pmic_eic->map, pmic_eic->offset + reg, &value);  in sprd_pmic_eic_set_debounce()
127 	return regmap_write(pmic_eic->map, pmic_eic->offset + reg, value);  in sprd_pmic_eic_set_debounce()
130 static int sprd_pmic_eic_set_config(struct gpio_chip *chip, unsigned int offset,  in sprd_pmic_eic_set_config()  argument
137 		return sprd_pmic_eic_set_debounce(chip, offset, arg);  in sprd_pmic_eic_set_config()
146 	u32 offset = irqd_to_hwirq(data);  in sprd_pmic_eic_irq_mask()  local
148 	pmic_eic->reg[REG_IE] &= ~BIT(offset);  in sprd_pmic_eic_irq_mask()
149 	pmic_eic->reg[REG_TRIG] &= ~BIT(offset);  in sprd_pmic_eic_irq_mask()
151 	gpiochip_disable_irq(chip, offset);  in sprd_pmic_eic_irq_mask()
158 	u32 offset = irqd_to_hwirq(data);  in sprd_pmic_eic_irq_unmask()  local
160 	gpiochip_enable_irq(chip, offset);  in sprd_pmic_eic_irq_unmask()
162 	pmic_eic->reg[REG_IE] |= BIT(offset);  in sprd_pmic_eic_irq_unmask()
163 	pmic_eic->reg[REG_TRIG] |= BIT(offset);  in sprd_pmic_eic_irq_unmask()
171 	u32 offset = irqd_to_hwirq(data);  in sprd_pmic_eic_irq_set_type()  local
175 		pmic_eic->reg[REG_IEV] |= BIT(offset);  in sprd_pmic_eic_irq_set_type()
178 		pmic_eic->reg[REG_IEV] &= ~BIT(offset);  in sprd_pmic_eic_irq_set_type()
208 	u32 offset = irqd_to_hwirq(data);  in sprd_pmic_eic_bus_sync_unlock()  local
213 		state = sprd_pmic_eic_get(chip, offset);  in sprd_pmic_eic_bus_sync_unlock()
215 			sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 0);  in sprd_pmic_eic_bus_sync_unlock()
217 			sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 1);  in sprd_pmic_eic_bus_sync_unlock()
219 		sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV,  in sprd_pmic_eic_bus_sync_unlock()
220 				     !!(pmic_eic->reg[REG_IEV] & BIT(offset)));  in sprd_pmic_eic_bus_sync_unlock()
224 	sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE,  in sprd_pmic_eic_bus_sync_unlock()
225 			     !!(pmic_eic->reg[REG_IE] & BIT(offset)));  in sprd_pmic_eic_bus_sync_unlock()
227 	sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_TRIG,  in sprd_pmic_eic_bus_sync_unlock()
228 			     !!(pmic_eic->reg[REG_TRIG] & BIT(offset)));  in sprd_pmic_eic_bus_sync_unlock()
234 					 unsigned int irq, unsigned int offset)  in sprd_pmic_eic_toggle_trigger()  argument
242 	state = sprd_pmic_eic_get(chip, offset);  in sprd_pmic_eic_toggle_trigger()
245 		sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 0);  in sprd_pmic_eic_toggle_trigger()
247 		sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IEV, 1);  in sprd_pmic_eic_toggle_trigger()
249 	post_state = sprd_pmic_eic_get(chip, offset);  in sprd_pmic_eic_toggle_trigger()
257 	sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_IE, 1);  in sprd_pmic_eic_toggle_trigger()
259 	sprd_pmic_eic_update(chip, offset, SPRD_PMIC_EIC_TRIG, 1);  in sprd_pmic_eic_toggle_trigger()
270 	ret = regmap_read(pmic_eic->map, pmic_eic->offset + SPRD_PMIC_EIC_MIS,  in sprd_pmic_eic_irq_handler()
325 	ret = of_property_read_u32(pdev->dev.of_node, "reg", &pmic_eic->offset);  in sprd_pmic_eic_probe()