1 // SPDX-License-Identifier: GPL-2.0
33 #define SPRD_PMIC_EIC_BIT(x)		((x) & (SPRD_PMIC_EIC_PER_BANK_NR - 1))
48  * struct sprd_pmic_eic - PMIC EIC controller
71 	regmap_update_bits(pmic_eic->map, pmic_eic->offset + reg,  in sprd_pmic_eic_update()
79 	u32 value;  in sprd_pmic_eic_read()  local
82 	ret = regmap_read(pmic_eic->map, pmic_eic->offset + reg, &value);  in sprd_pmic_eic_read()
86 	return !!(value & BIT(SPRD_PMIC_EIC_BIT(offset)));  in sprd_pmic_eic_read()
113 			      int value)  in sprd_pmic_eic_set()  argument
123 	u32 reg, value;  in sprd_pmic_eic_set_debounce()  local
127 	ret = regmap_read(pmic_eic->map, pmic_eic->offset + reg, &value);  in sprd_pmic_eic_set_debounce()
131 	value &= ~SPRD_PMIC_EIC_DBNC_MASK;  in sprd_pmic_eic_set_debounce()
132 	value |= (debounce / 1000) & SPRD_PMIC_EIC_DBNC_MASK;  in sprd_pmic_eic_set_debounce()
133 	return regmap_write(pmic_eic->map, pmic_eic->offset + reg, value);  in sprd_pmic_eic_set_debounce()
145 	return -ENOTSUPP;  in sprd_pmic_eic_set_config()
154 	pmic_eic->reg[REG_IE] &= ~BIT(offset);  in sprd_pmic_eic_irq_mask()
155 	pmic_eic->reg[REG_TRIG] &= ~BIT(offset);  in sprd_pmic_eic_irq_mask()
168 	pmic_eic->reg[REG_IE] |= BIT(offset);  in sprd_pmic_eic_irq_unmask()
169 	pmic_eic->reg[REG_TRIG] |= BIT(offset);  in sprd_pmic_eic_irq_unmask()
181 		pmic_eic->reg[REG_IEV] |= BIT(offset);  in sprd_pmic_eic_irq_set_type()
184 		pmic_eic->reg[REG_IEV] &= ~BIT(offset);  in sprd_pmic_eic_irq_set_type()
190 		 * Will set the trigger level according to current EIC level  in sprd_pmic_eic_irq_set_type()
195 		return -ENOTSUPP;  in sprd_pmic_eic_irq_set_type()
206 	mutex_lock(&pmic_eic->buslock);  in sprd_pmic_eic_bus_lock()
213 	u32 trigger = irqd_get_trigger_type(data);  in sprd_pmic_eic_bus_sync_unlock()  local
218 	if (trigger & IRQ_TYPE_EDGE_BOTH) {  in sprd_pmic_eic_bus_sync_unlock()
226 				     !!(pmic_eic->reg[REG_IEV] & BIT(offset)));  in sprd_pmic_eic_bus_sync_unlock()
231 			     !!(pmic_eic->reg[REG_IE] & BIT(offset)));  in sprd_pmic_eic_bus_sync_unlock()
232 	/* Generate trigger start pulse for debounce EIC */  in sprd_pmic_eic_bus_sync_unlock()
234 			     !!(pmic_eic->reg[REG_TRIG] & BIT(offset)));  in sprd_pmic_eic_bus_sync_unlock()
236 	mutex_unlock(&pmic_eic->buslock);  in sprd_pmic_eic_bus_sync_unlock()
242 	u32 trigger = irq_get_trigger_type(irq);  in sprd_pmic_eic_toggle_trigger()  local
245 	if (!(trigger & IRQ_TYPE_EDGE_BOTH))  in sprd_pmic_eic_toggle_trigger()
257 		dev_warn(chip->parent, "PMIC EIC level was changed.\n");  in sprd_pmic_eic_toggle_trigger()
264 	/* Generate trigger start pulse for debounce EIC */  in sprd_pmic_eic_toggle_trigger()
271 	struct gpio_chip *chip = &pmic_eic->chip;  in sprd_pmic_eic_irq_handler()
276 	ret = regmap_read(pmic_eic->map, pmic_eic->offset + SPRD_PMIC_EIC_MIS,  in sprd_pmic_eic_irq_handler()
283 	for_each_set_bit(n, &status, chip->ngpio) {  in sprd_pmic_eic_irq_handler()
287 		girq = irq_find_mapping(chip->irq.domain, n);  in sprd_pmic_eic_irq_handler()
291 		 * The PMIC EIC can only support level trigger, so we can  in sprd_pmic_eic_irq_handler()
292 		 * toggle the level trigger to emulate the edge trigger.  in sprd_pmic_eic_irq_handler()
301 	.name			= "sprd-pmic-eic",
317 	pmic_eic = devm_kzalloc(&pdev->dev, sizeof(*pmic_eic), GFP_KERNEL);  in sprd_pmic_eic_probe()
319 		return -ENOMEM;  in sprd_pmic_eic_probe()
321 	mutex_init(&pmic_eic->buslock);  in sprd_pmic_eic_probe()
323 	pmic_eic->irq = platform_get_irq(pdev, 0);  in sprd_pmic_eic_probe()
324 	if (pmic_eic->irq < 0)  in sprd_pmic_eic_probe()
325 		return pmic_eic->irq;  in sprd_pmic_eic_probe()
327 	pmic_eic->map = dev_get_regmap(pdev->dev.parent, NULL);  in sprd_pmic_eic_probe()
328 	if (!pmic_eic->map)  in sprd_pmic_eic_probe()
329 		return -ENODEV;  in sprd_pmic_eic_probe()
331 	ret = of_property_read_u32(pdev->dev.of_node, "reg", &pmic_eic->offset);  in sprd_pmic_eic_probe()
333 		dev_err(&pdev->dev, "Failed to get PMIC EIC base address.\n");  in sprd_pmic_eic_probe()
337 	ret = devm_request_threaded_irq(&pdev->dev, pmic_eic->irq, NULL,  in sprd_pmic_eic_probe()
340 					dev_name(&pdev->dev), pmic_eic);  in sprd_pmic_eic_probe()
342 		dev_err(&pdev->dev, "Failed to request PMIC EIC IRQ.\n");  in sprd_pmic_eic_probe()
346 	pmic_eic->chip.label = dev_name(&pdev->dev);  in sprd_pmic_eic_probe()
347 	pmic_eic->chip.ngpio = SPRD_PMIC_EIC_NR;  in sprd_pmic_eic_probe()
348 	pmic_eic->chip.base = -1;  in sprd_pmic_eic_probe()
349 	pmic_eic->chip.parent = &pdev->dev;  in sprd_pmic_eic_probe()
350 	pmic_eic->chip.direction_input = sprd_pmic_eic_direction_input;  in sprd_pmic_eic_probe()
351 	pmic_eic->chip.request = sprd_pmic_eic_request;  in sprd_pmic_eic_probe()
352 	pmic_eic->chip.free = sprd_pmic_eic_free;  in sprd_pmic_eic_probe()
353 	pmic_eic->chip.set_config = sprd_pmic_eic_set_config;  in sprd_pmic_eic_probe()
354 	pmic_eic->chip.set = sprd_pmic_eic_set;  in sprd_pmic_eic_probe()
355 	pmic_eic->chip.get = sprd_pmic_eic_get;  in sprd_pmic_eic_probe()
356 	pmic_eic->chip.can_sleep = true;  in sprd_pmic_eic_probe()
358 	irq = &pmic_eic->chip.irq;  in sprd_pmic_eic_probe()
360 	irq->threaded = true;  in sprd_pmic_eic_probe()
362 	ret = devm_gpiochip_add_data(&pdev->dev, &pmic_eic->chip, pmic_eic);  in sprd_pmic_eic_probe()
364 		dev_err(&pdev->dev, "Could not register gpiochip %d.\n", ret);  in sprd_pmic_eic_probe()
372 	{ .compatible = "sprd,sc2731-eic", },
380 		.name = "sprd-pmic-eic",