Lines Matching +defs:bit +defs:offset
85 #define LINE_USED(line, offset) (line & (BIT(offset)))
118 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset,
122 u32 l = BIT(offset);
136 static void omap_set_gpio_dataout_mask(struct gpio_bank *bank, unsigned offset,
140 BIT(offset), enable);
172 * @offset: the gpio number on this @bank
181 static int omap2_set_gpio_debounce(struct gpio_bank *bank, unsigned offset,
197 l = BIT(offset);
226 * @offset: the gpio number on this @bank
228 * If a gpio is using debounce, then clear the debounce enable bit and if
233 static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset)
235 u32 gpio_bit = BIT(offset);
374 static void omap_enable_gpio_module(struct gpio_bank *bank, unsigned offset)
380 writel_relaxed(readl_relaxed(reg) | (BIT(offset)), reg);
395 static void omap_disable_gpio_module(struct gpio_bank *bank, unsigned offset)
409 static int omap_gpio_is_input(struct gpio_bank *bank, unsigned offset)
413 return readl_relaxed(reg) & BIT(offset);
416 static void omap_gpio_init_irq(struct gpio_bank *bank, unsigned offset)
418 if (!LINE_USED(bank->mod_usage, offset)) {
419 omap_enable_gpio_module(bank, offset);
420 omap_set_gpio_direction(bank, offset, 1);
422 bank->irq_usage |= BIT(offset);
430 unsigned offset = d->hwirq;
440 retval = omap_set_gpio_triggering(bank, offset, type);
445 omap_gpio_init_irq(bank, offset);
446 if (!omap_gpio_is_input(bank, offset)) {
488 unsigned offset)
490 omap_clear_gpio_irqbank(bank, BIT(offset));
508 unsigned offset, int enable)
511 u32 gpio_mask = BIT(offset);
563 unsigned int bit;
597 bit = __ffs(isr);
598 isr &= ~(BIT(bit));
608 if (bank->toggle_mask & (BIT(bit)))
609 omap_toggle_gpio_edge_triggering(bank, bit);
615 generic_handle_domain_irq(bank->chip.irq.domain, bit);
629 unsigned offset = d->hwirq;
633 if (!LINE_USED(bank->mod_usage, offset))
634 omap_set_gpio_direction(bank, offset, 1);
635 omap_enable_gpio_module(bank, offset);
636 bank->irq_usage |= BIT(offset);
648 unsigned offset = d->hwirq;
651 bank->irq_usage &= ~(BIT(offset));
652 omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
653 omap_clear_gpio_irqstatus(bank, offset);
654 omap_set_gpio_irqenable(bank, offset, 0);
655 if (!LINE_USED(bank->mod_usage, offset))
656 omap_clear_gpio_debounce(bank, offset);
657 omap_disable_gpio_module(bank, offset);
678 unsigned offset = d->hwirq;
682 omap_set_gpio_triggering(bank, offset, IRQ_TYPE_NONE);
683 omap_set_gpio_irqenable(bank, offset, 0);
685 gpiochip_disable_irq(&bank->chip, offset);
691 unsigned offset = d->hwirq;
695 gpiochip_enable_irq(&bank->chip, offset);
697 omap_set_gpio_irqenable(bank, offset, 1);
706 omap_clear_gpio_irqstatus(bank, offset);
709 omap_set_gpio_triggering(bank, offset, trigger);
810 static int omap_gpio_request(struct gpio_chip *chip, unsigned offset)
818 omap_enable_gpio_module(bank, offset);
819 bank->mod_usage |= BIT(offset);
825 static void omap_gpio_free(struct gpio_chip *chip, unsigned offset)
831 bank->mod_usage &= ~(BIT(offset));
832 if (!LINE_USED(bank->irq_usage, offset)) {
833 omap_set_gpio_direction(bank, offset, 1);
834 omap_clear_gpio_debounce(bank, offset);
836 omap_disable_gpio_module(bank, offset);
842 static int omap_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
846 if (readl_relaxed(bank->base + bank->regs->direction) & BIT(offset))
852 static int omap_gpio_input(struct gpio_chip *chip, unsigned offset)
859 omap_set_gpio_direction(bank, offset, 1);
864 static int omap_gpio_get(struct gpio_chip *chip, unsigned offset)
869 if (omap_gpio_is_input(bank, offset))
874 return (readl_relaxed(reg) & BIT(offset)) != 0;
877 static int omap_gpio_output(struct gpio_chip *chip, unsigned offset, int value)
884 bank->set_dataout(bank, offset, value);
885 omap_set_gpio_direction(bank, offset, 0);
912 static int omap_gpio_debounce(struct gpio_chip *chip, unsigned offset,
922 ret = omap2_set_gpio_debounce(bank, offset, debounce);
928 offset, debounce, ret);
933 static int omap_gpio_set_config(struct gpio_chip *chip, unsigned offset,
943 ret = gpiochip_generic_config(chip, offset, config);
947 ret = omap_gpio_debounce(chip, offset, debounce);
956 static int omap_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
963 bank->set_dataout(bank, offset, value);
1066 /* MPUIO is a bit different, reading IRQ status clears it */