Lines Matching +full:clr +full:- +full:gpios
1 // SPDX-License-Identifier: GPL-2.0+
3 * Generic driver for memory-mapped GPIO controllers.
22 * . big-endian notation, just`. .. A bit more sophisticated controllers ,
23 * . register the device with -be`. .with a pair of set/clear-bit registers ,
29 * .. The expectation is that in at least some cases . ,-~~~-,
30 * .this will be used with roll-your-own ASIC/FPGA .` \ /
38 * . the number of GPIOs is determined by the width of ~
126 if (gc->be_bits) in bgpio_line2mask()
127 return BIT(gc->bgpio_bits - 1 - line); in bgpio_line2mask()
134 bool dir = !!(gc->bgpio_dir & pinmask); in bgpio_get_set()
137 return !!(gc->read_reg(gc->reg_set) & pinmask); in bgpio_get_set()
139 return !!(gc->read_reg(gc->reg_dat) & pinmask); in bgpio_get_set()
155 set_mask = *mask & gc->bgpio_dir; in bgpio_get_set_multiple()
156 get_mask = *mask & ~gc->bgpio_dir; in bgpio_get_set_multiple()
159 *bits |= gc->read_reg(gc->reg_set) & set_mask; in bgpio_get_set_multiple()
161 *bits |= gc->read_reg(gc->reg_dat) & get_mask; in bgpio_get_set_multiple()
168 return !!(gc->read_reg(gc->reg_dat) & bgpio_line2mask(gc, gpio)); in bgpio_get()
179 *bits |= gc->read_reg(gc->reg_dat) & *mask; in bgpio_get_multiple()
197 for_each_set_bit(bit, mask, gc->ngpio) in bgpio_get_multiple_be()
201 val = gc->read_reg(gc->reg_dat) & readmask; in bgpio_get_multiple_be()
207 for_each_set_bit(bit, &val, gc->ngpio) in bgpio_get_multiple_be()
222 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_set()
225 gc->bgpio_data |= mask; in bgpio_set()
227 gc->bgpio_data &= ~mask; in bgpio_set()
229 gc->write_reg(gc->reg_dat, gc->bgpio_data); in bgpio_set()
231 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_set()
240 gc->write_reg(gc->reg_set, mask); in bgpio_set_with_clear()
242 gc->write_reg(gc->reg_clr, mask); in bgpio_set_with_clear()
250 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_set_set()
253 gc->bgpio_data |= mask; in bgpio_set_set()
255 gc->bgpio_data &= ~mask; in bgpio_set_set()
257 gc->write_reg(gc->reg_set, gc->bgpio_data); in bgpio_set_set()
259 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_set_set()
272 for_each_set_bit(i, mask, gc->bgpio_bits) { in bgpio_multiple_get_masks()
288 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_set_multiple_single_reg()
292 gc->bgpio_data |= set_mask; in bgpio_set_multiple_single_reg()
293 gc->bgpio_data &= ~clear_mask; in bgpio_set_multiple_single_reg()
295 gc->write_reg(reg, gc->bgpio_data); in bgpio_set_multiple_single_reg()
297 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_set_multiple_single_reg()
303 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_dat); in bgpio_set_multiple()
309 bgpio_set_multiple_single_reg(gc, mask, bits, gc->reg_set); in bgpio_set_multiple_set()
321 gc->write_reg(gc->reg_set, set_mask); in bgpio_set_multiple_with_clear()
323 gc->write_reg(gc->reg_clr, clear_mask); in bgpio_set_multiple_with_clear()
334 return -EINVAL; in bgpio_dir_out_err()
340 gc->set(gc, gpio, val); in bgpio_simple_dir_out()
349 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_dir_in()
351 gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio); in bgpio_dir_in()
353 if (gc->reg_dir_in) in bgpio_dir_in()
354 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir); in bgpio_dir_in()
355 if (gc->reg_dir_out) in bgpio_dir_in()
356 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir); in bgpio_dir_in()
358 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_dir_in()
366 if (gc->bgpio_dir_unreadable) { in bgpio_get_dir()
367 if (gc->bgpio_dir & bgpio_line2mask(gc, gpio)) in bgpio_get_dir()
372 if (gc->reg_dir_out) { in bgpio_get_dir()
373 if (gc->read_reg(gc->reg_dir_out) & bgpio_line2mask(gc, gpio)) in bgpio_get_dir()
378 if (gc->reg_dir_in) in bgpio_get_dir()
379 if (!(gc->read_reg(gc->reg_dir_in) & bgpio_line2mask(gc, gpio))) in bgpio_get_dir()
389 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in bgpio_dir_out()
391 gc->bgpio_dir |= bgpio_line2mask(gc, gpio); in bgpio_dir_out()
393 if (gc->reg_dir_in) in bgpio_dir_out()
394 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir); in bgpio_dir_out()
395 if (gc->reg_dir_out) in bgpio_dir_out()
396 gc->write_reg(gc->reg_dir_out, gc->bgpio_dir); in bgpio_dir_out()
398 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in bgpio_dir_out()
405 gc->set(gc, gpio, val); in bgpio_dir_out_dir_first()
412 gc->set(gc, gpio, val); in bgpio_dir_out_val_first()
422 switch (gc->bgpio_bits) { in bgpio_setup_accessors()
424 gc->read_reg = bgpio_read8; in bgpio_setup_accessors()
425 gc->write_reg = bgpio_write8; in bgpio_setup_accessors()
429 gc->read_reg = bgpio_read16be; in bgpio_setup_accessors()
430 gc->write_reg = bgpio_write16be; in bgpio_setup_accessors()
432 gc->read_reg = bgpio_read16; in bgpio_setup_accessors()
433 gc->write_reg = bgpio_write16; in bgpio_setup_accessors()
438 gc->read_reg = bgpio_read32be; in bgpio_setup_accessors()
439 gc->write_reg = bgpio_write32be; in bgpio_setup_accessors()
441 gc->read_reg = bgpio_read32; in bgpio_setup_accessors()
442 gc->write_reg = bgpio_write32; in bgpio_setup_accessors()
450 return -EINVAL; in bgpio_setup_accessors()
452 gc->read_reg = bgpio_read64; in bgpio_setup_accessors()
453 gc->write_reg = bgpio_write64; in bgpio_setup_accessors()
458 dev_err(dev, "unsupported data width %u bits\n", gc->bgpio_bits); in bgpio_setup_accessors()
459 return -EINVAL; in bgpio_setup_accessors()
469 * - single input/output register resource (named "dat").
470 * - set/clear pair (named "set" and "clr").
471 * - single output register resource and single input resource ("set" and
475 * by clearing a bit. For the set clr pair, this drives a 1 by setting a bit
481 * - simple bidirection GPIO that requires no configuration.
482 * - an output direction register (named "dirout") where a 1 bit
484 * - an input direction register (named "dirin") where a 1 bit indicates
490 void __iomem *clr, in bgpio_setup_io() argument
494 gc->reg_dat = dat; in bgpio_setup_io()
495 if (!gc->reg_dat) in bgpio_setup_io()
496 return -EINVAL; in bgpio_setup_io()
498 if (set && clr) { in bgpio_setup_io()
499 gc->reg_set = set; in bgpio_setup_io()
500 gc->reg_clr = clr; in bgpio_setup_io()
501 gc->set = bgpio_set_with_clear; in bgpio_setup_io()
502 gc->set_multiple = bgpio_set_multiple_with_clear; in bgpio_setup_io()
503 } else if (set && !clr) { in bgpio_setup_io()
504 gc->reg_set = set; in bgpio_setup_io()
505 gc->set = bgpio_set_set; in bgpio_setup_io()
506 gc->set_multiple = bgpio_set_multiple_set; in bgpio_setup_io()
508 gc->set = bgpio_set_none; in bgpio_setup_io()
509 gc->set_multiple = NULL; in bgpio_setup_io()
511 gc->set = bgpio_set; in bgpio_setup_io()
512 gc->set_multiple = bgpio_set_multiple; in bgpio_setup_io()
517 gc->get = bgpio_get_set; in bgpio_setup_io()
518 if (!gc->be_bits) in bgpio_setup_io()
519 gc->get_multiple = bgpio_get_set_multiple; in bgpio_setup_io()
521 * We deliberately avoid assigning the ->get_multiple() call in bgpio_setup_io()
528 gc->get = bgpio_get; in bgpio_setup_io()
529 if (gc->be_bits) in bgpio_setup_io()
530 gc->get_multiple = bgpio_get_multiple_be; in bgpio_setup_io()
532 gc->get_multiple = bgpio_get_multiple; in bgpio_setup_io()
544 gc->reg_dir_out = dirout; in bgpio_setup_direction()
545 gc->reg_dir_in = dirin; in bgpio_setup_direction()
547 gc->direction_output = bgpio_dir_out_dir_first; in bgpio_setup_direction()
549 gc->direction_output = bgpio_dir_out_val_first; in bgpio_setup_direction()
550 gc->direction_input = bgpio_dir_in; in bgpio_setup_direction()
551 gc->get_direction = bgpio_get_dir; in bgpio_setup_direction()
554 gc->direction_output = bgpio_dir_out_err; in bgpio_setup_direction()
556 gc->direction_output = bgpio_simple_dir_out; in bgpio_setup_direction()
557 gc->direction_input = bgpio_simple_dir_in; in bgpio_setup_direction()
565 if (gpio_pin < chip->ngpio) in bgpio_request()
568 return -EINVAL; in bgpio_request()
572 * bgpio_init() - Initialize generic GPIO accessor functions
582 * @clr: MMIO address for the register to CLEAR the value of the GPIO lines, it is
600 void __iomem *clr, void __iomem *dirout, void __iomem *dirin, in bgpio_init() argument
606 return -EINVAL; in bgpio_init()
608 gc->bgpio_bits = sz * 8; in bgpio_init()
609 if (gc->bgpio_bits > BITS_PER_LONG) in bgpio_init()
610 return -EINVAL; in bgpio_init()
612 raw_spin_lock_init(&gc->bgpio_lock); in bgpio_init()
613 gc->parent = dev; in bgpio_init()
614 gc->label = dev_name(dev); in bgpio_init()
615 gc->base = -1; in bgpio_init()
616 gc->request = bgpio_request; in bgpio_init()
617 gc->be_bits = !!(flags & BGPIOF_BIG_ENDIAN); in bgpio_init()
621 gc->ngpio = gc->bgpio_bits; in bgpio_init()
623 ret = bgpio_setup_io(gc, dat, set, clr, flags); in bgpio_init()
635 gc->bgpio_data = gc->read_reg(gc->reg_dat); in bgpio_init()
636 if (gc->set == bgpio_set_set && in bgpio_init()
638 gc->bgpio_data = gc->read_reg(gc->reg_set); in bgpio_init()
641 gc->bgpio_dir_unreadable = true; in bgpio_init()
646 if ((gc->reg_dir_out || gc->reg_dir_in) && in bgpio_init()
648 if (gc->reg_dir_out) in bgpio_init()
649 gc->bgpio_dir = gc->read_reg(gc->reg_dir_out); in bgpio_init()
650 else if (gc->reg_dir_in) in bgpio_init()
651 gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in); in bgpio_init()
658 if (gc->reg_dir_out && gc->reg_dir_in) in bgpio_init()
659 gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir); in bgpio_init()
681 return IOMEM_ERR_PTR(-EINVAL); in bgpio_map()
683 return devm_ioremap_resource(&pdev->dev, r); in bgpio_map()
687 { .compatible = "brcm,bcm6345-gpio" },
688 { .compatible = "wd,mbl-gpio" },
689 { .compatible = "ni,169445-nand-gpio" },
703 return ERR_PTR(-ENOMEM); in bgpio_parse_fw()
705 pdata->base = -1; in bgpio_parse_fw()
710 if (device_property_read_bool(dev, "no-output")) in bgpio_parse_fw()
718 struct device *dev = &pdev->dev; in bgpio_pdev_probe()
722 void __iomem *clr; in bgpio_pdev_probe() local
737 flags = pdev->id_entry->driver_data; in bgpio_pdev_probe()
742 return -EINVAL; in bgpio_pdev_probe()
754 clr = bgpio_map(pdev, "clr", sz); in bgpio_pdev_probe()
755 if (IS_ERR(clr)) in bgpio_pdev_probe()
756 return PTR_ERR(clr); in bgpio_pdev_probe()
766 gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL); in bgpio_pdev_probe()
768 return -ENOMEM; in bgpio_pdev_probe()
770 err = bgpio_init(gc, dev, sz, dat, set, clr, dirout, dirin, flags); in bgpio_pdev_probe()
775 if (pdata->label) in bgpio_pdev_probe()
776 gc->label = pdata->label; in bgpio_pdev_probe()
777 gc->base = pdata->base; in bgpio_pdev_probe()
778 if (pdata->ngpio > 0) in bgpio_pdev_probe()
779 gc->ngpio = pdata->ngpio; in bgpio_pdev_probe()
784 return devm_gpiochip_add_data(&pdev->dev, gc, NULL); in bgpio_pdev_probe()
789 .name = "basic-mmio-gpio",
792 .name = "basic-mmio-gpio-be",
801 .name = "basic-mmio-gpio",
812 MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");