Lines Matching +full:- +full:group
1 // SPDX-License-Identifier: GPL-2.0-or-later
168 static inline u32 gpreg_read(struct lpc32xx_gpio_chip *group, unsigned long offset) in gpreg_read() argument
170 return __raw_readl(group->reg_base + offset); in gpreg_read()
173 static inline void gpreg_write(struct lpc32xx_gpio_chip *group, u32 val, unsigned long offset) in gpreg_write() argument
175 __raw_writel(val, group->reg_base + offset); in gpreg_write()
178 static void __set_gpio_dir_p012(struct lpc32xx_gpio_chip *group, in __set_gpio_dir_p012() argument
182 gpreg_write(group, GPIO012_PIN_TO_BIT(pin), in __set_gpio_dir_p012()
183 group->gpio_grp->dir_clr); in __set_gpio_dir_p012()
185 gpreg_write(group, GPIO012_PIN_TO_BIT(pin), in __set_gpio_dir_p012()
186 group->gpio_grp->dir_set); in __set_gpio_dir_p012()
189 static void __set_gpio_dir_p3(struct lpc32xx_gpio_chip *group, in __set_gpio_dir_p3() argument
195 gpreg_write(group, u, group->gpio_grp->dir_clr); in __set_gpio_dir_p3()
197 gpreg_write(group, u, group->gpio_grp->dir_set); in __set_gpio_dir_p3()
200 static void __set_gpio_level_p012(struct lpc32xx_gpio_chip *group, in __set_gpio_level_p012() argument
204 gpreg_write(group, GPIO012_PIN_TO_BIT(pin), in __set_gpio_level_p012()
205 group->gpio_grp->outp_set); in __set_gpio_level_p012()
207 gpreg_write(group, GPIO012_PIN_TO_BIT(pin), in __set_gpio_level_p012()
208 group->gpio_grp->outp_clr); in __set_gpio_level_p012()
211 static void __set_gpio_level_p3(struct lpc32xx_gpio_chip *group, in __set_gpio_level_p3() argument
217 gpreg_write(group, u, group->gpio_grp->outp_set); in __set_gpio_level_p3()
219 gpreg_write(group, u, group->gpio_grp->outp_clr); in __set_gpio_level_p3()
222 static void __set_gpo_level_p3(struct lpc32xx_gpio_chip *group, in __set_gpo_level_p3() argument
226 gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_set); in __set_gpo_level_p3()
228 gpreg_write(group, GPO3_PIN_TO_BIT(pin), group->gpio_grp->outp_clr); in __set_gpo_level_p3()
231 static int __get_gpio_state_p012(struct lpc32xx_gpio_chip *group, in __get_gpio_state_p012() argument
234 return GPIO012_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state), in __get_gpio_state_p012()
238 static int __get_gpio_state_p3(struct lpc32xx_gpio_chip *group, in __get_gpio_state_p3() argument
241 int state = gpreg_read(group, group->gpio_grp->inp_state); in __get_gpio_state_p3()
244 * P3 GPIO pin input mapping is not contiguous, GPIOP3-0..4 is mapped in __get_gpio_state_p3()
245 * to bits 10..14, while GPIOP3-5 is mapped to bit 24. in __get_gpio_state_p3()
250 static int __get_gpi_state_p3(struct lpc32xx_gpio_chip *group, in __get_gpi_state_p3() argument
253 return GPI3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->inp_state), pin); in __get_gpi_state_p3()
256 static int __get_gpo_state_p3(struct lpc32xx_gpio_chip *group, in __get_gpo_state_p3() argument
259 return GPO3_PIN_IN_SEL(gpreg_read(group, group->gpio_grp->outp_state), pin); in __get_gpo_state_p3()
268 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_dir_input_p012() local
270 __set_gpio_dir_p012(group, pin, 1); in lpc32xx_gpio_dir_input_p012()
278 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_dir_input_p3() local
280 __set_gpio_dir_p3(group, pin, 1); in lpc32xx_gpio_dir_input_p3()
293 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_get_value_p012() local
295 return !!__get_gpio_state_p012(group, pin); in lpc32xx_gpio_get_value_p012()
300 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_get_value_p3() local
302 return !!__get_gpio_state_p3(group, pin); in lpc32xx_gpio_get_value_p3()
307 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpi_get_value() local
309 return !!__get_gpi_state_p3(group, pin); in lpc32xx_gpi_get_value()
315 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_dir_output_p012() local
317 __set_gpio_level_p012(group, pin, value); in lpc32xx_gpio_dir_output_p012()
318 __set_gpio_dir_p012(group, pin, 0); in lpc32xx_gpio_dir_output_p012()
326 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_dir_output_p3() local
328 __set_gpio_level_p3(group, pin, value); in lpc32xx_gpio_dir_output_p3()
329 __set_gpio_dir_p3(group, pin, 0); in lpc32xx_gpio_dir_output_p3()
337 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_dir_out_always() local
339 __set_gpo_level_p3(group, pin, value); in lpc32xx_gpio_dir_out_always()
346 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_set_value_p012() local
348 __set_gpio_level_p012(group, pin, value); in lpc32xx_gpio_set_value_p012()
356 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpio_set_value_p3() local
358 __set_gpio_level_p3(group, pin, value); in lpc32xx_gpio_set_value_p3()
366 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpo_set_value() local
368 __set_gpo_level_p3(group, pin, value); in lpc32xx_gpo_set_value()
375 struct lpc32xx_gpio_chip *group = gpiochip_get_data(chip); in lpc32xx_gpo_get_value() local
377 return !!__get_gpo_state_p3(group, pin); in lpc32xx_gpo_get_value()
382 if (pin < chip->ngpio) in lpc32xx_gpio_request()
385 return -EINVAL; in lpc32xx_gpio_request()
390 return -ENXIO; in lpc32xx_gpio_to_irq_p01()
395 return -ENXIO; in lpc32xx_gpio_to_irq_gpio_p3()
400 return -ENXIO; in lpc32xx_gpio_to_irq_gpi_p3()
501 u32 bank = gpiospec->args[0]; in lpc32xx_of_xlate()
504 return -EINVAL; in lpc32xx_of_xlate()
507 *flags = gpiospec->args[2]; in lpc32xx_of_xlate()
508 return gpiospec->args[1]; in lpc32xx_of_xlate()
521 lpc32xx_gpiochip[i].chip.parent = &pdev->dev; in lpc32xx_gpio_probe()
522 if (pdev->dev.of_node) { in lpc32xx_gpio_probe()
527 devm_gpiochip_add_data(&pdev->dev, &lpc32xx_gpiochip[i].chip, in lpc32xx_gpio_probe()
535 { .compatible = "nxp,lpc3220-gpio", },
542 .name = "lpc32xx-gpio",