Lines Matching +full:0 +full:xd0
23 #define SIO_LDSEL 0x07 /* Logical device select */
24 #define SIO_DEVID 0x20 /* Device ID (2 bytes) */
26 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
27 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
32 #define SIO_FINTEK_DEVREV 0x22 /* Fintek Device revision */
33 #define SIO_FINTEK_MANID 0x23 /* Fintek ID (2 bytes) */
35 #define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
37 #define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
38 #define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
39 #define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
40 #define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
41 #define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */
42 #define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
43 #define SIO_F81804_ID 0x1502 /* F81804 chipset ID, same for F81966 */
44 #define SIO_F81865_ID 0x0704 /* F81865 chipset ID */
46 #define SIO_LD_GPIO_FINTEK 0x06 /* GPIO logical device */
51 #define SIO_NCT6126D_ID 0xD283 /* NCT6126D chipset ID */
53 #define SIO_LD_GPIO_NUVOTON 0x07 /* GPIO logical device */
130 pr_err("I/O address 0x%04x already in use\n", base); in superio_enter()
138 return 0; in superio_enter()
184 #define f7188x_gpio_dir(base) ((base) + 0)
187 /* Output mode register (0:open drain 1:push-pull). */
194 F7188X_GPIO_BANK(6, 0xF0, DRVNAME "-0"),
195 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
196 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
197 F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
198 F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
199 F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"),
200 F7188X_GPIO_BANK(6, 0x90, DRVNAME "-6"),
204 F7188X_GPIO_BANK(6, 0xF0, DRVNAME "-0"),
205 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
206 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
207 F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
208 F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
209 F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"),
210 F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"),
211 F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"),
215 F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"),
216 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
217 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
218 F7188X_GPIO_BANK(4, 0xC0, DRVNAME "-3"),
219 F7188X_GPIO_BANK(4, 0xB0, DRVNAME "-4"),
223 F7188X_GPIO_BANK(7, 0xF0, DRVNAME "-0"),
224 F7188X_GPIO_BANK(7, 0xE0, DRVNAME "-1"),
225 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
226 F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
227 F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
228 F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"),
229 F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"),
230 F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"),
234 F7188X_GPIO_BANK(7, 0xF0, DRVNAME "-0"),
235 F7188X_GPIO_BANK(7, 0xE0, DRVNAME "-1"),
236 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
237 F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
238 F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
239 F7188X_GPIO_BANK(5, 0xA0, DRVNAME "-5"),
240 F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"),
241 F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"),
245 F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"),
246 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
247 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
248 F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
249 F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
250 F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-5"),
251 F7188X_GPIO_BANK(8, 0x90, DRVNAME "-6"),
252 F7188X_GPIO_BANK(8, 0x80, DRVNAME "-7"),
253 F7188X_GPIO_BANK(8, 0x88, DRVNAME "-8"),
258 F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"),
259 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
260 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
261 F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-3"),
262 F7188X_GPIO_BANK(8, 0x90, DRVNAME "-4"),
263 F7188X_GPIO_BANK(8, 0x80, DRVNAME "-5"),
264 F7188X_GPIO_BANK(8, 0x98, DRVNAME "-6"),
268 F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-0"),
269 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-1"),
270 F7188X_GPIO_BANK(8, 0xD0, DRVNAME "-2"),
271 F7188X_GPIO_BANK(8, 0xC0, DRVNAME "-3"),
272 F7188X_GPIO_BANK(8, 0xB0, DRVNAME "-4"),
273 F7188X_GPIO_BANK(8, 0xA0, DRVNAME "-5"),
274 F7188X_GPIO_BANK(5, 0x90, DRVNAME "-6"),
278 F7188X_GPIO_BANK(8, 0xE0, DRVNAME "-0"),
279 F7188X_GPIO_BANK(8, 0xE4, DRVNAME "-1"),
280 F7188X_GPIO_BANK(8, 0xE8, DRVNAME "-2"),
281 F7188X_GPIO_BANK(8, 0xEC, DRVNAME "-3"),
282 F7188X_GPIO_BANK(8, 0xF0, DRVNAME "-4"),
283 F7188X_GPIO_BANK(8, 0xF4, DRVNAME "-5"),
284 F7188X_GPIO_BANK(8, 0xF8, DRVNAME "-6"),
285 F7188X_GPIO_BANK(8, 0xFC, DRVNAME "-7"),
335 return 0; in f7188x_gpio_direction_in()
391 return 0; in f7188x_gpio_direction_out()
442 return 0; in f7188x_gpio_set_config()
505 for (i = 0; i < data->nr_bank; i++) { in f7188x_gpio_probe()
520 return 0; in f7188x_gpio_probe()
567 pr_info("Unsupported Fintek device 0x%04x\n", devid); in f7188x_find()
575 pr_debug("Not a Fintek device at 0x%08x\n", addr); in f7188x_find()
581 err = 0; in f7188x_find()
616 return 0; in f7188x_gpio_device_add()
642 if (f7188x_find(0x2e, &sio) && in f7188x_gpio_init()
643 f7188x_find(0x4e, &sio)) in f7188x_gpio_init()