Lines Matching +full:gpio +full:- +full:7 +full:- +full:segment
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2012 Avionic Design GmbH
6 #include <linux/gpio/driver.h>
15 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift) argument
16 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift) argument
17 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift) argument
18 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift) argument
19 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift) argument
23 struct gpio_chip gpio; member
41 err = i2c_smbus_read_byte_data(adnp->client, offset); in adnp_read()
43 dev_err(adnp->gpio.parent, "%s failed: %d\n", in adnp_read()
56 err = i2c_smbus_write_byte_data(adnp->client, offset, value); in adnp_write()
58 dev_err(adnp->gpio.parent, "%s failed: %d\n", in adnp_write()
69 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_get()
70 unsigned int pos = offset & 7; in adnp_gpio_get()
83 unsigned int reg = offset >> adnp->reg_shift; in __adnp_gpio_set()
84 unsigned int pos = offset & 7; in __adnp_gpio_set()
104 mutex_lock(&adnp->i2c_lock); in adnp_gpio_set()
106 mutex_unlock(&adnp->i2c_lock); in adnp_gpio_set()
112 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_input()
113 unsigned int pos = offset & 7; in adnp_gpio_direction_input()
117 mutex_lock(&adnp->i2c_lock); in adnp_gpio_direction_input()
134 err = -EPERM; in adnp_gpio_direction_input()
141 mutex_unlock(&adnp->i2c_lock); in adnp_gpio_direction_input()
149 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_output()
150 unsigned int pos = offset & 7; in adnp_gpio_direction_output()
154 mutex_lock(&adnp->i2c_lock); in adnp_gpio_direction_output()
171 err = -EPERM; in adnp_gpio_direction_output()
179 mutex_unlock(&adnp->i2c_lock); in adnp_gpio_direction_output()
186 unsigned int num_regs = 1 << adnp->reg_shift, i, j; in adnp_gpio_dbg_show()
192 mutex_lock(&adnp->i2c_lock); in adnp_gpio_dbg_show()
210 mutex_unlock(&adnp->i2c_lock); in adnp_gpio_dbg_show()
213 unsigned int bit = (i << adnp->reg_shift) + j; in adnp_gpio_dbg_show()
239 mutex_unlock(&adnp->i2c_lock); in adnp_gpio_dbg_show()
247 num_regs = 1 << adnp->reg_shift; in adnp_irq()
250 unsigned int base = i << adnp->reg_shift, bit; in adnp_irq()
255 mutex_lock(&adnp->i2c_lock); in adnp_irq()
259 mutex_unlock(&adnp->i2c_lock); in adnp_irq()
265 mutex_unlock(&adnp->i2c_lock); in adnp_irq()
271 mutex_unlock(&adnp->i2c_lock); in adnp_irq()
275 mutex_unlock(&adnp->i2c_lock); in adnp_irq()
278 changed = level ^ adnp->irq_level[i]; in adnp_irq()
280 /* compute edge-triggered interrupts */ in adnp_irq()
281 pending = changed & ((adnp->irq_fall[i] & ~level) | in adnp_irq()
282 (adnp->irq_rise[i] & level)); in adnp_irq()
284 /* add in level-triggered interrupts */ in adnp_irq()
285 pending |= (adnp->irq_high[i] & level) | in adnp_irq()
286 (adnp->irq_low[i] & ~level); in adnp_irq()
288 /* mask out non-pending and disabled interrupts */ in adnp_irq()
293 child_irq = irq_find_mapping(adnp->gpio.irq.domain, in adnp_irq()
306 unsigned int reg = d->hwirq >> adnp->reg_shift; in adnp_irq_mask()
307 unsigned int pos = d->hwirq & 7; in adnp_irq_mask()
309 adnp->irq_enable[reg] &= ~BIT(pos); in adnp_irq_mask()
317 unsigned int reg = d->hwirq >> adnp->reg_shift; in adnp_irq_unmask()
318 unsigned int pos = d->hwirq & 7; in adnp_irq_unmask()
321 adnp->irq_enable[reg] |= BIT(pos); in adnp_irq_unmask()
328 unsigned int reg = d->hwirq >> adnp->reg_shift; in adnp_irq_set_type()
329 unsigned int pos = d->hwirq & 7; in adnp_irq_set_type()
332 adnp->irq_rise[reg] |= BIT(pos); in adnp_irq_set_type()
334 adnp->irq_rise[reg] &= ~BIT(pos); in adnp_irq_set_type()
337 adnp->irq_fall[reg] |= BIT(pos); in adnp_irq_set_type()
339 adnp->irq_fall[reg] &= ~BIT(pos); in adnp_irq_set_type()
342 adnp->irq_high[reg] |= BIT(pos); in adnp_irq_set_type()
344 adnp->irq_high[reg] &= ~BIT(pos); in adnp_irq_set_type()
347 adnp->irq_low[reg] |= BIT(pos); in adnp_irq_set_type()
349 adnp->irq_low[reg] &= ~BIT(pos); in adnp_irq_set_type()
359 mutex_lock(&adnp->irq_lock); in adnp_irq_bus_lock()
366 unsigned int num_regs = 1 << adnp->reg_shift, i; in adnp_irq_bus_unlock()
368 mutex_lock(&adnp->i2c_lock); in adnp_irq_bus_unlock()
371 adnp_write(adnp, GPIO_IER(adnp) + i, adnp->irq_enable[i]); in adnp_irq_bus_unlock()
373 mutex_unlock(&adnp->i2c_lock); in adnp_irq_bus_unlock()
374 mutex_unlock(&adnp->irq_lock); in adnp_irq_bus_unlock()
378 .name = "gpio-adnp",
390 unsigned int num_regs = 1 << adnp->reg_shift, i; in adnp_irq_setup()
391 struct gpio_chip *chip = &adnp->gpio; in adnp_irq_setup()
394 mutex_init(&adnp->irq_lock); in adnp_irq_setup()
402 * each segment contains the corresponding bits for all interrupts. in adnp_irq_setup()
404 adnp->irq_enable = devm_kcalloc(chip->parent, num_regs, 6, in adnp_irq_setup()
406 if (!adnp->irq_enable) in adnp_irq_setup()
407 return -ENOMEM; in adnp_irq_setup()
409 adnp->irq_level = adnp->irq_enable + (num_regs * 1); in adnp_irq_setup()
410 adnp->irq_rise = adnp->irq_enable + (num_regs * 2); in adnp_irq_setup()
411 adnp->irq_fall = adnp->irq_enable + (num_regs * 3); in adnp_irq_setup()
412 adnp->irq_high = adnp->irq_enable + (num_regs * 4); in adnp_irq_setup()
413 adnp->irq_low = adnp->irq_enable + (num_regs * 5); in adnp_irq_setup()
420 err = adnp_read(adnp, GPIO_PLR(adnp) + i, &adnp->irq_level[i]); in adnp_irq_setup()
429 adnp->irq_enable[i] = 0x00; in adnp_irq_setup()
432 err = devm_request_threaded_irq(chip->parent, adnp->client->irq, in adnp_irq_setup()
435 dev_name(chip->parent), adnp); in adnp_irq_setup()
437 dev_err(chip->parent, "can't request IRQ#%d: %d\n", in adnp_irq_setup()
438 adnp->client->irq, err); in adnp_irq_setup()
448 struct gpio_chip *chip = &adnp->gpio; in adnp_gpio_setup()
451 adnp->reg_shift = get_count_order(num_gpios) - 3; in adnp_gpio_setup()
453 chip->direction_input = adnp_gpio_direction_input; in adnp_gpio_setup()
454 chip->direction_output = adnp_gpio_direction_output; in adnp_gpio_setup()
455 chip->get = adnp_gpio_get; in adnp_gpio_setup()
456 chip->set = adnp_gpio_set; in adnp_gpio_setup()
457 chip->can_sleep = true; in adnp_gpio_setup()
460 chip->dbg_show = adnp_gpio_dbg_show; in adnp_gpio_setup()
462 chip->base = -1; in adnp_gpio_setup()
463 chip->ngpio = num_gpios; in adnp_gpio_setup()
464 chip->label = adnp->client->name; in adnp_gpio_setup()
465 chip->parent = &adnp->client->dev; in adnp_gpio_setup()
466 chip->owner = THIS_MODULE; in adnp_gpio_setup()
475 girq = &chip->irq; in adnp_gpio_setup()
479 girq->parent_handler = NULL; in adnp_gpio_setup()
480 girq->num_parents = 0; in adnp_gpio_setup()
481 girq->parents = NULL; in adnp_gpio_setup()
482 girq->default_type = IRQ_TYPE_NONE; in adnp_gpio_setup()
483 girq->handler = handle_simple_irq; in adnp_gpio_setup()
484 girq->threaded = true; in adnp_gpio_setup()
487 err = devm_gpiochip_add_data(&adnp->client->dev, chip, adnp); in adnp_gpio_setup()
496 struct device *dev = &client->dev; in adnp_i2c_probe()
501 err = device_property_read_u32(dev, "nr-gpios", &num_gpios); in adnp_i2c_probe()
505 adnp = devm_kzalloc(&client->dev, sizeof(*adnp), GFP_KERNEL); in adnp_i2c_probe()
507 return -ENOMEM; in adnp_i2c_probe()
509 mutex_init(&adnp->i2c_lock); in adnp_i2c_probe()
510 adnp->client = client; in adnp_i2c_probe()
512 err = adnp_gpio_setup(adnp, num_gpios, device_property_read_bool(dev, "interrupt-controller")); in adnp_i2c_probe()
522 { "gpio-adnp" },
528 { .compatible = "ad,gpio-adnp", },
535 .name = "gpio-adnp",
543 MODULE_DESCRIPTION("Avionic Design N-bit GPIO expander");
544 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");