Lines Matching +full:full +full:- +full:bit

1 /* SPDX-License-Identifier: GPL-2.0 */
16 	// register number for auxiliary command register when swap bit is set (9914 mode)
49 /* TURBO-488 registers bit definitions */
62 /* CFG -- Configuration Register (write only) */
65 				 * (tnt4882 one-chip and newer only?)
75 	TNT_B_16BIT = (1 << 0),	/* 1=FIFO is 16-bit register, 0=8-bit */
78 /* CMDR -- Command Register */
80 	CLRSC = 0x2,	/* clear the system controller bit */
81 	SETSC = 0x3,	/* set the system controller bit */
89 /* HSSEL -- handshake select register (write only) */
96 /* IMR0 -- Interrupt Mode Register 0 */
105 	TNT_IMR0_ALWAYS_BITS = 0x80,	/* always set this bit on write */
108 /* ISR0 -- Interrupt Status Register 0 */
120 /* ISR3 -- Interrupt Status Register 3 (read only) */
125 	HR_NFF = (1 << 3),	/* NOT full fifo */
135 /* STS1 -- Status Register 1 (read only) */
147 /* STS2 -- Status Register 2 */
149 	AFFN = (1 << 3),	/* "A full FIFO NOT"  (0=FIFO full)  */
151 	BFFN = (1 << 1),	/* "B full FIFO NOT"  (0=FIFO full)  */
172  /* no talking when no listeners bit (prevents bus errors when data written at wrong time) */
175 	CHES_BIT = 0x1, /*clear holdoff on end select bit*/