893 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)  in zynqmp_pm_set_sd_tapdelay()  argument
896 	u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);  in zynqmp_pm_set_sd_tapdelay()
899 		return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 4, node_id, IOCTL_SET_SD_TAPDELAY, type,  in zynqmp_pm_set_sd_tapdelay()
932 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)  in zynqmp_pm_sd_dll_reset()  argument
934 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SD_DLL_RESET, type);  in zynqmp_pm_sd_dll_reset()
1365 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)  in zynqmp_pm_get_rpu_mode()  argument
1370 	ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 2, node_id, IOCTL_GET_RPU_OPER_MODE);  in zynqmp_pm_get_rpu_mode()
1390 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)  in zynqmp_pm_set_rpu_mode()  argument
1392 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_SET_RPU_OPER_MODE,  in zynqmp_pm_set_rpu_mode()
1407 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)  in zynqmp_pm_set_tcm_config()  argument
1409 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 3, node_id, IOCTL_TCM_COMB_CONFIG,  in zynqmp_pm_set_tcm_config()
1617 int zynqmp_pm_sec_read_reg(u32 node_id, u32 offset, u32 *ret_value)  in zynqmp_pm_sec_read_reg()  argument
1626 	ret = zynqmp_pm_invoke_fn(PM_IOCTL, ret_payload, 4, node_id, IOCTL_READ_REG,  in zynqmp_pm_sec_read_reg()
1645 int zynqmp_pm_sec_mask_write_reg(const u32 node_id, const u32 offset, u32 mask,  in zynqmp_pm_sec_mask_write_reg()  argument
1648 	return zynqmp_pm_invoke_fn(PM_IOCTL, NULL, 5, node_id, IOCTL_MASK_WRITE_REG,  in zynqmp_pm_sec_mask_write_reg()