18 #include <linux/io-64-nonatomic-lo-hi.h>
29 /* Intel X38 register addresses - device 0 function 0 - DRAM Controller */
52 				 * 11    MCH Thermal Sensor Event
55 				 *  9    LOCK to non-DRAM Memory Flag (LCKF)
59 				 *  1    Multi-bit DRAM ECC Error Flag (DMERR)
60 				 *  0    Single-bit DRAM ECC Error Flag (DSERR)
67 /* Intel  MMIO register space - device 0 function 0 - MMR space */
105 	if (capid0_8b & 0x20) {	/* check DCD: Dual Channel Disable */  in how_many_channel()
154 	pdev = to_pci_dev(mci->pdev);  in x38_clear_error_info()
168 	void __iomem *window = mci->pvt_info;  in x38_get_and_clear_error_info()
170 	pdev = to_pci_dev(mci->pdev);  in x38_get_and_clear_error_info()
177 	pci_read_config_word(pdev, X38_ERRSTS, &info->errsts);  in x38_get_and_clear_error_info()
178 	if (!(info->errsts & X38_ERRSTS_BITS))  in x38_get_and_clear_error_info()
181 	info->eccerrlog[0] = lo_hi_readq(window + X38_C0ECCERRLOG);  in x38_get_and_clear_error_info()
183 		info->eccerrlog[1] = lo_hi_readq(window + X38_C1ECCERRLOG);  in x38_get_and_clear_error_info()
185 	pci_read_config_word(pdev, X38_ERRSTS, &info->errsts2);  in x38_get_and_clear_error_info()
193 	if ((info->errsts ^ info->errsts2) & X38_ERRSTS_BITS) {  in x38_get_and_clear_error_info()
194 		info->eccerrlog[0] = lo_hi_readq(window + X38_C0ECCERRLOG);  in x38_get_and_clear_error_info()
196 			info->eccerrlog[1] =  in x38_get_and_clear_error_info()
209 	if (!(info->errsts & X38_ERRSTS_BITS))  in x38_process_error_info()
212 	if ((info->errsts ^ info->errsts2) & X38_ERRSTS_BITS) {  in x38_process_error_info()
214 				     -1, -1, -1,  in x38_process_error_info()
216 		info->errsts = info->errsts2;  in x38_process_error_info()
220 		log = info->eccerrlog[channel];  in x38_process_error_info()
225 					     -1, -1,  in x38_process_error_info()
231 					     -1, -1,  in x38_process_error_info()
296 	return drbs[X38_CHANNELS - 1][X38_RANKS_PER_CHANNEL - 1] == tom;  in x38_is_stacked()
307 		n -= drbs[channel][rank - 1];  in drb_to_nr_pages()
309 				drbs[channel][X38_RANKS_PER_CHANNEL - 1]) {  in drb_to_nr_pages()
310 		n -= drbs[0][X38_RANKS_PER_CHANNEL - 1];  in drb_to_nr_pages()
313 	n <<= (X38_DRB_SHIFT - PAGE_SHIFT);  in drb_to_nr_pages()
331 		return -ENODEV;  in x38_probe1()
346 		return -ENOMEM;  in x38_probe1()
350 	mci->pdev = &pdev->dev;  in x38_probe1()
351 	mci->mtype_cap = MEM_FLAG_DDR2;  in x38_probe1()
353 	mci->edac_ctl_cap = EDAC_FLAG_SECDED;  in x38_probe1()
354 	mci->edac_cap = EDAC_FLAG_SECDED;  in x38_probe1()
356 	mci->mod_name = EDAC_MOD_STR;  in x38_probe1()
357 	mci->ctl_name = x38_devs[dev_idx].ctl_name;  in x38_probe1()
358 	mci->dev_name = pci_name(pdev);  in x38_probe1()
359 	mci->edac_check = x38_check;  in x38_probe1()
360 	mci->ctl_page_to_phys = NULL;  in x38_probe1()
361 	mci->pvt_info = window;  in x38_probe1()
371 	for (i = 0; i < mci->nr_csrows; i++) {  in x38_probe1()
373 		struct csrow_info *csrow = mci->csrows[i];  in x38_probe1()
383 			struct dimm_info *dimm = csrow->channels[j]->dimm;  in x38_probe1()
385 			dimm->nr_pages = nr_pages / x38_channel_num;  in x38_probe1()
386 			dimm->grain = nr_pages << PAGE_SHIFT;  in x38_probe1()
387 			dimm->mtype = MEM_DDR2;  in x38_probe1()
388 			dimm->dtype = DEV_UNKNOWN;  in x38_probe1()
389 			dimm->edac_mode = EDAC_UNKNOWN;  in x38_probe1()
395 	rc = -ENODEV;  in x38_probe1()
420 		return -EIO;  in x38_init_one()
422 	rc = x38_probe1(pdev, ent->driver_data);  in x38_init_one()
435 	mci = edac_mc_del_mc(&pdev->dev);  in x38_remove_one()
439 	iounmap(mci->pvt_info);  in x38_remove_one()
481 			pci_rc = -ENODEV;  in x38_init()
488 			pci_rc = -ENODEV;  in x38_init()
520 MODULE_DESCRIPTION("MC support for Intel X38 memory hub controllers");