Lines Matching +full:mc +full:- +full:bus
1 // SPDX-License-Identifier: GPL-2.0
10 * when linked once into a module and into a built-in object, at the
12 * file is being linked into a built-in object.
63 return -ENODEV; in skx_adxl_get()
84 skx_printk(KERN_NOTICE, "Not enough ADXL components for 2-level memory.\n"); in skx_adxl_get()
97 return -ENOMEM; in skx_adxl_get()
104 return -ENOMEM; in skx_adxl_get()
115 return -ENODEV; in skx_adxl_get()
135 for (int i = 0; i < d->num_imc; i++) in skx_init_mc_mapping()
136 d->imc[i].mc_mapping = i; in skx_init_mc_mapping()
141 edac_dbg(0, "Set the mapping of mc phy idx to logical idx: %02d -> %02d\n", in skx_set_mc_mapping()
144 d->imc[lmc].mc_mapping = pmc; in skx_set_mc_mapping()
150 for (int lmc = 0; lmc < d->num_imc; lmc++) { in skx_get_mc_mapping()
151 if (d->imc[lmc].mc_mapping == pmc) { in skx_get_mc_mapping()
152 edac_dbg(0, "Get the mapping of mc phy idx to logical idx: %02d -> %02d\n", in skx_get_mc_mapping()
159 return -1; in skx_get_mc_mapping()
167 if (res->addr >= skx_tohm || (res->addr >= skx_tolm && in skx_adxl_decode()
168 res->addr < BIT_ULL(32))) { in skx_adxl_decode()
169 edac_dbg(0, "Address 0x%llx out of range\n", res->addr); in skx_adxl_decode()
173 if (adxl_decode(res->addr, adxl_values)) { in skx_adxl_decode()
174 edac_dbg(0, "Failed to decode 0x%llx\n", res->addr); in skx_adxl_decode()
180 * a near-memory error(DDR5) as a far-memory error(CXL), resulting in skx_adxl_decode()
182 * To address this, prefetch the decoded far-memory controller ID in skx_adxl_decode()
183 * and adjust the error source to near-memory if the far-memory in skx_adxl_decode()
186 if (skx_res_cfg && skx_res_cfg->type == GNR && err_src == ERR_SRC_2LM_FM) { in skx_adxl_decode()
187 res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]]; in skx_adxl_decode()
188 if (res->imc == -1) { in skx_adxl_decode()
190 edac_dbg(0, "Adjust the error source to near-memory.\n"); in skx_adxl_decode()
194 res->socket = (int)adxl_values[component_indices[INDEX_SOCKET]]; in skx_adxl_decode()
196 res->imc = (adxl_nm_bitmap & BIT_NM_MEMCTRL) ? in skx_adxl_decode()
197 (int)adxl_values[component_indices[INDEX_NM_MEMCTRL]] : -1; in skx_adxl_decode()
198 res->channel = (adxl_nm_bitmap & BIT_NM_CHANNEL) ? in skx_adxl_decode()
199 (int)adxl_values[component_indices[INDEX_NM_CHANNEL]] : -1; in skx_adxl_decode()
200 res->dimm = (adxl_nm_bitmap & BIT_NM_DIMM) ? in skx_adxl_decode()
201 (int)adxl_values[component_indices[INDEX_NM_DIMM]] : -1; in skx_adxl_decode()
202 res->cs = (adxl_nm_bitmap & BIT_NM_CS) ? in skx_adxl_decode()
203 (int)adxl_values[component_indices[INDEX_NM_CS]] : -1; in skx_adxl_decode()
205 res->imc = (int)adxl_values[component_indices[INDEX_MEMCTRL]]; in skx_adxl_decode()
206 res->channel = (int)adxl_values[component_indices[INDEX_CHANNEL]]; in skx_adxl_decode()
207 res->dimm = (int)adxl_values[component_indices[INDEX_DIMM]]; in skx_adxl_decode()
208 res->cs = (int)adxl_values[component_indices[INDEX_CS]]; in skx_adxl_decode()
211 if (res->imc < 0) { in skx_adxl_decode()
212 skx_printk(KERN_ERR, "Bad imc %d\n", res->imc); in skx_adxl_decode()
217 if (d->imc[0].src_id == res->socket) { in skx_adxl_decode()
218 res->dev = d; in skx_adxl_decode()
223 if (!res->dev) { in skx_adxl_decode()
225 res->socket, res->imc); in skx_adxl_decode()
229 lmc = skx_get_mc_mapping(d, res->imc); in skx_adxl_decode()
231 skx_printk(KERN_ERR, "No lmc for imc %d\n", res->imc); in skx_adxl_decode()
235 res->imc = lmc; in skx_adxl_decode()
241 len += snprintf(adxl_msg + len, MSG_SIZE - len, " %s:0x%llx", in skx_adxl_decode()
243 if (MSG_SIZE - len <= 0) in skx_adxl_decode()
247 res->decoded_by_adxl = true; in skx_adxl_decode()
276 node = pcibus_to_node(d->util_all->bus); in skx_get_pkg_id()
278 for_each_cpu(cpu, cpumask_of_pcibus(d->util_all->bus)) { in skx_get_pkg_id()
281 if (c->initialized && cpu_to_node(cpu) == node) { in skx_get_pkg_id()
289 return -ENODEV; in skx_get_pkg_id()
297 * The 3-bit source IDs in PCI configuration space registers are limited in skx_get_src_id()
307 if (pci_read_config_dword(d->util_all, off, ®)) { in skx_get_src_id()
309 return -ENODEV; in skx_get_src_id()
331 * We use the per-socket device @cfg->did to count how many sockets are present,
337 int ndev = 0, imc_num = cfg->ddr_imc_num + cfg->hbm_imc_num; in skx_get_all_bus_mappings()
344 pdev = pci_get_device(PCI_VENDOR_ID_INTEL, cfg->decs_did, prev); in skx_get_all_bus_mappings()
351 return -ENOMEM; in skx_get_all_bus_mappings()
354 if (pci_read_config_dword(pdev, cfg->busno_cfg_offset, ®)) { in skx_get_all_bus_mappings()
357 skx_printk(KERN_ERR, "Failed to read bus idx\n"); in skx_get_all_bus_mappings()
358 return -ENODEV; in skx_get_all_bus_mappings()
361 d->bus[0] = GET_BITFIELD(reg, 0, 7); in skx_get_all_bus_mappings()
362 d->bus[1] = GET_BITFIELD(reg, 8, 15); in skx_get_all_bus_mappings()
363 if (cfg->type == SKX) { in skx_get_all_bus_mappings()
364 d->seg = pci_domain_nr(pdev->bus); in skx_get_all_bus_mappings()
365 d->bus[2] = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
366 d->bus[3] = GET_BITFIELD(reg, 24, 31); in skx_get_all_bus_mappings()
368 d->seg = GET_BITFIELD(reg, 16, 23); in skx_get_all_bus_mappings()
371 d->num_imc = imc_num; in skx_get_all_bus_mappings()
374 d->bus[0], d->bus[1], d->bus[2], d->bus[3], imc_num); in skx_get_all_bus_mappings()
375 list_add_tail(&d->list, &dev_edac_list); in skx_get_all_bus_mappings()
395 return -ENODEV; in skx_get_hi_lo()
423 return -ENODEV; in skx_get_hi_lo()
434 return -EINVAL; in skx_get_dimm_attr()
453 cols = imc->hbm_mc ? 6 : numcol(mtr); in skx_get_dimm_info()
455 if (imc->hbm_mc) { in skx_get_dimm_info()
458 } else if (cfg->support_ddr5) { in skx_get_dimm_info()
467 * Compute size in 8-byte (2^3) words, then shift to MiB (2^20) in skx_get_dimm_info()
469 size = ((1ull << (rows + cols + ranks)) * banks) >> (20 - 3); in skx_get_dimm_info()
472 …edac_dbg(0, "mc#%d: channel %d, dimm %d, %lld MiB (%d pages) bank: %d, rank: %d, row: 0x%x, col: 0… in skx_get_dimm_info()
473 imc->mc, chan, dimmno, size, npages, in skx_get_dimm_info()
476 imc->chan[chan].dimms[dimmno].close_pg = GET_BITFIELD(mcmtr, 0, 0); in skx_get_dimm_info()
477 imc->chan[chan].dimms[dimmno].bank_xor_enable = GET_BITFIELD(mcmtr, 9, 9); in skx_get_dimm_info()
478 imc->chan[chan].dimms[dimmno].fine_grain_bank = GET_BITFIELD(amap, 0, 0); in skx_get_dimm_info()
479 imc->chan[chan].dimms[dimmno].rowbits = rows; in skx_get_dimm_info()
480 imc->chan[chan].dimms[dimmno].colbits = cols; in skx_get_dimm_info()
482 dimm->nr_pages = npages; in skx_get_dimm_info()
483 dimm->grain = 32; in skx_get_dimm_info()
484 dimm->dtype = get_width(mtr); in skx_get_dimm_info()
485 dimm->mtype = mtype; in skx_get_dimm_info()
486 dimm->edac_mode = EDAC_SECDED; /* likely better than this */ in skx_get_dimm_info()
488 if (imc->hbm_mc) in skx_get_dimm_info()
489 snprintf(dimm->label, sizeof(dimm->label), "CPU_SrcID#%u_HBMC#%u_Chan#%u", in skx_get_dimm_info()
490 imc->src_id, imc->lmc, chan); in skx_get_dimm_info()
492 snprintf(dimm->label, sizeof(dimm->label), "CPU_SrcID#%u_MC#%u_Chan#%u_DIMM#%u", in skx_get_dimm_info()
493 imc->src_id, imc->lmc, chan, dimmno); in skx_get_dimm_info()
507 dev_handle = ACPI_NFIT_BUILD_DEVICE_HANDLE(dimmno, chan, imc->lmc, in skx_get_nvdimm_info()
508 imc->src_id, 0); in skx_get_nvdimm_info()
511 if (smbios_handle == -EOPNOTSUPP) { in skx_get_nvdimm_info()
532 dimm->nr_pages = size >> PAGE_SHIFT; in skx_get_nvdimm_info()
533 dimm->grain = 32; in skx_get_nvdimm_info()
534 dimm->dtype = DEV_UNKNOWN; in skx_get_nvdimm_info()
535 dimm->mtype = MEM_NVDIMM; in skx_get_nvdimm_info()
536 dimm->edac_mode = EDAC_SECDED; /* likely better than this */ in skx_get_nvdimm_info()
538 edac_dbg(0, "mc#%d: channel %d, dimm %d, %llu MiB (%u pages)\n", in skx_get_nvdimm_info()
539 imc->mc, chan, dimmno, size >> 20, dimm->nr_pages); in skx_get_nvdimm_info()
541 snprintf(dimm->label, sizeof(dimm->label), "CPU_SrcID#%u_MC#%u_Chan#%u_DIMM#%u", in skx_get_nvdimm_info()
542 imc->src_id, imc->lmc, chan, dimmno); in skx_get_nvdimm_info()
558 /* Allocate a new MC control structure */ in skx_register_mci()
560 layers[0].size = imc->num_channels; in skx_register_mci()
563 layers[1].size = imc->num_dimms; in skx_register_mci()
565 mci = edac_mc_alloc(imc->mc, ARRAY_SIZE(layers), layers, in skx_register_mci()
569 return -ENOMEM; in skx_register_mci()
571 edac_dbg(0, "MC#%d: mci = %p\n", imc->mc, mci); in skx_register_mci()
574 imc->mci = mci; in skx_register_mci()
575 pvt = mci->pvt_info; in skx_register_mci()
576 pvt->imc = imc; in skx_register_mci()
578 mci->ctl_name = kasprintf(GFP_KERNEL, "%s#%d IMC#%d", ctl_name, in skx_register_mci()
579 imc->src_id, imc->lmc); in skx_register_mci()
580 if (!mci->ctl_name) { in skx_register_mci()
581 rc = -ENOMEM; in skx_register_mci()
585 mci->mtype_cap = MEM_FLAG_DDR4 | MEM_FLAG_NVDIMM; in skx_register_mci()
586 if (cfg->support_ddr5) in skx_register_mci()
587 mci->mtype_cap |= MEM_FLAG_DDR5; in skx_register_mci()
588 mci->edac_ctl_cap = EDAC_FLAG_NONE; in skx_register_mci()
589 mci->edac_cap = EDAC_FLAG_NONE; in skx_register_mci()
590 mci->mod_name = mod_str; in skx_register_mci()
591 mci->dev_name = pci_name(pdev); in skx_register_mci()
592 mci->ctl_page_to_phys = NULL; in skx_register_mci()
599 mci->pdev = &pdev->dev; in skx_register_mci()
601 /* Add this new MC control structure to EDAC's list of MCs */ in skx_register_mci()
603 edac_dbg(0, "MC: failed edac_mc_add_mc()\n"); in skx_register_mci()
604 rc = -EINVAL; in skx_register_mci()
611 kfree(mci->ctl_name); in skx_register_mci()
614 imc->mci = NULL; in skx_register_mci()
621 struct mem_ctl_info *mci = imc->mci; in skx_unregister_mci()
626 edac_dbg(0, "MC%d: mci = %p\n", imc->mc, mci); in skx_unregister_mci()
628 /* Remove MC sysfs nodes */ in skx_unregister_mci()
629 edac_mc_del_mc(mci->pdev); in skx_unregister_mci()
631 edac_dbg(1, "%s: free mci struct\n", mci->ctl_name); in skx_unregister_mci()
632 kfree(mci->ctl_name); in skx_unregister_mci()
642 bool ripv = GET_BITFIELD(m->mcgstatus, 0, 0); in skx_mce_output_error()
643 bool overflow = GET_BITFIELD(m->status, 62, 62); in skx_mce_output_error()
644 bool uncorrected_error = GET_BITFIELD(m->status, 61, 61); in skx_mce_output_error()
648 u32 core_err_cnt = GET_BITFIELD(m->status, 38, 52); in skx_mce_output_error()
649 u32 mscod = GET_BITFIELD(m->status, 16, 31); in skx_mce_output_error()
650 u32 errcode = GET_BITFIELD(m->status, 0, 15); in skx_mce_output_error()
651 u32 optypenum = GET_BITFIELD(m->status, 4, 6); in skx_mce_output_error()
653 recoverable = GET_BITFIELD(m->status, 56, 56); in skx_mce_output_error()
688 if (res->decoded_by_adxl) { in skx_mce_output_error()
699 res->socket, res->imc, res->rank, in skx_mce_output_error()
700 res->row, res->column, res->bank_address, res->bank_group); in skx_mce_output_error()
704 skx_show_retry_rd_err_log(res, skx_msg + len, MSG_SIZE - len, scrub_err); in skx_mce_output_error()
710 m->addr >> PAGE_SHIFT, m->addr & ~PAGE_MASK, 0, in skx_mce_output_error()
711 res->channel, res->dimm, -1, in skx_mce_output_error()
717 u32 errcode = GET_BITFIELD(m->status, 0, 15) & MCACOD_MEM_ERR_MASK; in skx_error_source()
740 if (mce->kflags & MCE_HANDLED_CEC) in skx_mce_check_error()
746 if (err_src == ERR_SRC_NOT_MEMORY || !(mce->status & MCI_STATUS_ADDRV)) in skx_mce_check_error()
751 res.addr = mce->addr & MCI_ADDR_PHYSADDR; in skx_mce_check_error()
753 pr_err("Invalid address 0x%llx in IA32_MC%d_ADDR\n", mce->addr, mce->bank); in skx_mce_check_error()
764 mci = res.dev->imc[res.imc].mci; in skx_mce_check_error()
769 if (mce->mcgstatus & MCG_STATUS_MCIP) in skx_mce_check_error()
777 "Bank %d: 0x%llx\n", mce->extcpu, type, in skx_mce_check_error()
778 mce->mcgstatus, mce->bank, mce->status); in skx_mce_check_error()
779 skx_mc_printk(mci, KERN_DEBUG, "TSC 0x%llx ", mce->tsc); in skx_mce_check_error()
780 skx_mc_printk(mci, KERN_DEBUG, "ADDR 0x%llx ", mce->addr); in skx_mce_check_error()
781 skx_mc_printk(mci, KERN_DEBUG, "MISC 0x%llx ", mce->misc); in skx_mce_check_error()
784 "%u APIC 0x%x\n", mce->cpuvendor, mce->cpuid, in skx_mce_check_error()
785 mce->time, mce->socketid, mce->apicid); in skx_mce_check_error()
789 mce->kflags |= MCE_HANDLED_EDAC; in skx_mce_check_error()
802 list_del(&d->list); in skx_remove()
803 for (i = 0; i < d->num_imc; i++) { in skx_remove()
804 if (d->imc[i].mci) in skx_remove()
805 skx_unregister_mci(&d->imc[i]); in skx_remove()
807 if (d->imc[i].mdev) in skx_remove()
808 pci_dev_put(d->imc[i].mdev); in skx_remove()
810 if (d->imc[i].mbase) in skx_remove()
811 iounmap(d->imc[i].mbase); in skx_remove()
813 for (j = 0; j < d->imc[i].num_channels; j++) { in skx_remove()
814 if (d->imc[i].chan[j].cdev) in skx_remove()
815 pci_dev_put(d->imc[i].chan[j].cdev); in skx_remove()
818 if (d->util_all) in skx_remove()
819 pci_dev_put(d->util_all); in skx_remove()
820 if (d->pcu_cr3) in skx_remove()
821 pci_dev_put(d->pcu_cr3); in skx_remove()
822 if (d->sad_all) in skx_remove()
823 pci_dev_put(d->sad_all); in skx_remove()
824 if (d->uracu) in skx_remove()
825 pci_dev_put(d->uracu); in skx_remove()
881 MODULE_DESCRIPTION("MC Driver for Intel server processors");