146 			  int interleave)  in sad_pkg()  argument
148 	return GET_BITFIELD(reg, table[interleave].start,  in sad_pkg()
149 			    table[interleave].end);  in sad_pkg()
1148  * @ways:	output number of interleave ways
1222  * (This is the per-tile mapping of logical interleave targets to
1243  * (This is the per-tile mapping of logical interleave targets to
1324  * have to figure this out from the SAD rules, interleave lists, route tables,
1456 				edac_dbg(0, "Unexpected interleave target %d\n",  in knl_get_dimm_capacity()
1467 		edac_dbg(3, "dram rule %d (base 0x%llx, limit 0x%llx), %d way interleave%s\n",  in knl_get_dimm_capacity()
1532 		/* Figure out which channels participate in interleave. */  in knl_get_dimm_capacity()
1797 	 * Step 2) Get SAD range and SAD Interleave list  in get_memory_layout()
1798 	 * TAD registers contain the interleave wayness. However, it  in get_memory_layout()
1817 		edac_dbg(0, "SAD#%d %s up to %u.%03u GB (0x%016Lx) Interleave: %s reg=0x%08x\n",  in get_memory_layout()
1834 			edac_dbg(0, "SAD#%d, interleave #%d: %d\n",  in get_memory_layout()
1854 …edac_dbg(0, "TAD#%d: up to %u.%03u GB (0x%016Lx), socket interleave %d, memory interleave %d, TGT:…  in get_memory_layout()
2109 			edac_dbg(0, "SAD interleave #%d: %d\n",  in get_memory_error_data()
2112 		edac_dbg(0, "mc#%d: Error detected on SAD#%d: address 0x%016Lx < 0x%016Lx, Interleave [%d:6]%s\n",  in get_memory_error_data()
2136 			sprintf(msg, "Can't discover socket interleave");  in get_memory_error_data()
2140 		edac_dbg(0, "SAD interleave index: %d (wayness %d) = CPU socket %d\n",  in get_memory_error_data()
2153 			/* interleave mode will XOR {8,7,6} with {18,17,16} */  in get_memory_error_data()
2169 		edac_dbg(0, "SAD interleave package: %d = CPU socket %d, HA %i, shiftup: %i\n",  in get_memory_error_data()
2172 		/* Ivy Bridge's SAD mode doesn't support XOR interleave mode */  in get_memory_error_data()
2177 		edac_dbg(0, "SAD interleave package: %d = CPU socket %d, HA %d\n",  in get_memory_error_data()
2277 …edac_dbg(0, "TAD#%d: address 0x%016Lx < 0x%016Lx, socket interleave %d, channel interleave %d (off…  in get_memory_error_data()
2360 	edac_dbg(0, "RIR#%d: channel address 0x%08Lx < 0x%08Lx, RIR interleave %d, index %d\n",  in get_memory_error_data()