Lines Matching +full:col +full:- +full:offset

1 // SPDX-License-Identifier: GPL-2.0
12 #include <asm/hardware/cache-l2x0.h>
13 #include <asm/hardware/cache-aurora-l2.h>
86 uint16_t col) in axp_mc_calc_address() argument
88 if (drvdata->width == 8) { in axp_mc_calc_address()
90 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
95 ((col & 0x3ff) << 3)); in axp_mc_calc_address()
99 ((col & 0x3ff)) << 3)); in axp_mc_calc_address()
100 } else if (drvdata->width == 4) { in axp_mc_calc_address()
102 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
107 ((col & 0x3ff) << 2)); in axp_mc_calc_address()
111 ((col & 0x3ff)) << 2)); in axp_mc_calc_address()
114 if (drvdata->cs_addr_sel[cs]) in axp_mc_calc_address()
119 ((col & 0x3ff) << 1)); in axp_mc_calc_address()
123 ((col & 0x3ff)) << 1)); in axp_mc_calc_address()
129 struct axp_mc_drvdata *drvdata = mci->pvt_info; in axp_mc_check()
134 char *msg = drvdata->msg; in axp_mc_check()
136 data_h = readl(drvdata->base + SDRAM_ERR_DATA_H_REG); in axp_mc_check()
137 data_l = readl(drvdata->base + SDRAM_ERR_DATA_L_REG); in axp_mc_check()
138 recv_ecc = readl(drvdata->base + SDRAM_ERR_RECV_ECC_REG); in axp_mc_check()
139 calc_ecc = readl(drvdata->base + SDRAM_ERR_CALC_ECC_REG); in axp_mc_check()
140 addr = readl(drvdata->base + SDRAM_ERR_ADDR_REG); in axp_mc_check()
141 cnt_sbe = readl(drvdata->base + SDRAM_ERR_SBE_COUNT_REG); in axp_mc_check()
142 cnt_dbe = readl(drvdata->base + SDRAM_ERR_DBE_COUNT_REG); in axp_mc_check()
143 cause_err = readl(drvdata->base + SDRAM_ERR_CAUSE_ERR_REG); in axp_mc_check()
144 cause_msg = readl(drvdata->base + SDRAM_ERR_CAUSE_MSG_REG); in axp_mc_check()
148 drvdata->base + SDRAM_ERR_CAUSE_ERR_REG); in axp_mc_check()
150 drvdata->base + SDRAM_ERR_CAUSE_MSG_REG); in axp_mc_check()
154 writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG); in axp_mc_check()
156 writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG); in axp_mc_check()
163 cnt_sbe--; in axp_mc_check()
165 dev_warn(mci->pdev, "inconsistent SBE count detected\n"); in axp_mc_check()
168 cnt_dbe--; in axp_mc_check()
170 dev_warn(mci->pdev, "inconsistent DBE count detected\n"); in axp_mc_check()
177 0, 0, 0, /* pfn, offset, syndrome */ in axp_mc_check()
178 -1, -1, -1, /* top, mid, low layer */ in axp_mc_check()
179 mci->ctl_name, in axp_mc_check()
184 0, 0, 0, /* pfn, offset, syndrome */ in axp_mc_check()
185 -1, -1, -1, /* top, mid, low layer */ in axp_mc_check()
186 mci->ctl_name, in axp_mc_check()
199 msg += sprintf(msg, "col=0x%04x ", col_val); /* 11 chars */ in axp_mc_check()
208 cs_val, -1, -1, /* top, mid, low layer */ in axp_mc_check()
209 mci->ctl_name, drvdata->msg); in axp_mc_check()
216 cs_val, -1, -1, /* top, mid, low layer */ in axp_mc_check()
217 mci->ctl_name, drvdata->msg); in axp_mc_check()
223 struct axp_mc_drvdata *drvdata = mci->pvt_info; in axp_mc_read_config()
228 config = readl(drvdata->base + SDRAM_CONFIG_REG); in axp_mc_read_config()
231 drvdata->width = 8; in axp_mc_read_config()
234 drvdata->width = 4; in axp_mc_read_config()
236 addr_ctrl = readl(drvdata->base + SDRAM_ADDR_CTRL_REG); in axp_mc_read_config()
237 rank_ctrl = readl(drvdata->base + SDRAM_RANK_CTRL_REG); in axp_mc_read_config()
239 dimm = mci->dimms[i]; in axp_mc_read_config()
244 drvdata->cs_addr_sel[i] = in axp_mc_read_config()
248 … = ((addr_ctrl & SDRAM_ADDR_CTRL_SIZE_HIGH_MASK(i)) >> (SDRAM_ADDR_CTRL_SIZE_HIGH_OFFSET(i) - 2) | in axp_mc_read_config()
253 dimm->nr_pages = 524288; in axp_mc_read_config()
256 dimm->nr_pages = 65536; in axp_mc_read_config()
259 dimm->nr_pages = 131072; in axp_mc_read_config()
262 dimm->nr_pages = 262144; in axp_mc_read_config()
265 dimm->nr_pages = 1048576; in axp_mc_read_config()
268 dimm->nr_pages = 2097152; in axp_mc_read_config()
271 dimm->grain = 8; in axp_mc_read_config()
272 dimm->dtype = cs_struct ? DEV_X16 : DEV_X8; in axp_mc_read_config()
273 dimm->mtype = (config & SDRAM_CONFIG_REGISTERED_MASK) ? in axp_mc_read_config()
275 dimm->edac_mode = EDAC_SECDED; in axp_mc_read_config()
280 {.compatible = "marvell,armada-xp-sdram-controller",},
296 dev_err(&pdev->dev, "Unable to map regs\n"); in axp_mc_probe()
302 dev_warn(&pdev->dev, "SDRAM ECC is not enabled\n"); in axp_mc_probe()
303 return -EINVAL; in axp_mc_probe()
312 return -ENOMEM; in axp_mc_probe()
314 drvdata = mci->pvt_info; in axp_mc_probe()
315 drvdata->base = base; in axp_mc_probe()
316 mci->pdev = &pdev->dev; in axp_mc_probe()
319 id = of_match_device(axp_mc_of_match, &pdev->dev); in axp_mc_probe()
320 mci->edac_check = axp_mc_check; in axp_mc_probe()
321 mci->mtype_cap = MEM_FLAG_DDR3; in axp_mc_probe()
322 mci->edac_cap = EDAC_FLAG_SECDED; in axp_mc_probe()
323 mci->mod_name = pdev->dev.driver->name; in axp_mc_probe()
324 mci->ctl_name = id ? id->compatible : "unknown"; in axp_mc_probe()
325 mci->dev_name = dev_name(&pdev->dev); in axp_mc_probe()
326 mci->scrub_mode = SCRUB_NONE; in axp_mc_probe()
332 of_machine_is_compatible("marvell,armadaxp-98dx3236")) in axp_mc_probe()
333 drvdata->width /= 2; in axp_mc_probe()
337 writel(1 << SDRAM_ERR_CTRL_THR_OFFSET, drvdata->base + SDRAM_ERR_CTRL_REG); in axp_mc_probe()
340 …writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_ERR… in axp_mc_probe()
341 …writel(~(SDRAM_ERR_CAUSE_DBE_MASK | SDRAM_ERR_CAUSE_SBE_MASK), drvdata->base + SDRAM_ERR_CAUSE_MSG… in axp_mc_probe()
344 writel(0, drvdata->base + SDRAM_ERR_SBE_COUNT_REG); in axp_mc_probe()
345 writel(0, drvdata->base + SDRAM_ERR_DBE_COUNT_REG); in axp_mc_probe()
349 return -EINVAL; in axp_mc_probe()
360 edac_mc_del_mc(&pdev->dev); in axp_mc_remove()
392 drvdata->inject_addr &= AURORA_ERR_INJECT_CTL_ADDR_MASK; in aurora_l2_inject()
393 drvdata->inject_ctl &= AURORA_ERR_INJECT_CTL_EN_MASK; in aurora_l2_inject()
394 writel(0, drvdata->base + AURORA_ERR_INJECT_CTL_REG); in aurora_l2_inject()
395 writel(drvdata->inject_mask, drvdata->base + AURORA_ERR_INJECT_MASK_REG); in aurora_l2_inject()
396 writel(drvdata->inject_addr | drvdata->inject_ctl, drvdata->base + AURORA_ERR_INJECT_CTL_REG); in aurora_l2_inject()
402 struct aurora_l2_drvdata *drvdata = dci->pvt_info; in aurora_l2_check()
405 char *msg = drvdata->msg; in aurora_l2_check()
406 size_t size = sizeof(drvdata->msg); in aurora_l2_check()
409 cnt = readl(drvdata->base + AURORA_ERR_CNT_REG); in aurora_l2_check()
410 attr_cap = readl(drvdata->base + AURORA_ERR_ATTR_CAP_REG); in aurora_l2_check()
411 addr_cap = readl(drvdata->base + AURORA_ERR_ADDR_CAP_REG); in aurora_l2_check()
412 way_cap = readl(drvdata->base + AURORA_ERR_WAY_CAP_REG); in aurora_l2_check()
418 writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG); in aurora_l2_check()
425 len += scnprintf(msg+len, size-len, "src=CPU%d ", src); in aurora_l2_check()
427 len += scnprintf(msg+len, size-len, "src=IO "); in aurora_l2_check()
432 len += scnprintf(msg+len, size-len, "txn=Data-Read "); in aurora_l2_check()
435 len += scnprintf(msg+len, size-len, "txn=Isn-Read "); in aurora_l2_check()
438 len += scnprintf(msg+len, size-len, "txn=Clean-Flush "); in aurora_l2_check()
441 len += scnprintf(msg+len, size-len, "txn=Eviction "); in aurora_l2_check()
444 len += scnprintf(msg+len, size-len, in aurora_l2_check()
445 "txn=Read-Modify-Write "); in aurora_l2_check()
452 len += scnprintf(msg+len, size-len, "err=CorrECC "); in aurora_l2_check()
455 len += scnprintf(msg+len, size-len, "err=UnCorrECC "); in aurora_l2_check()
458 len += scnprintf(msg+len, size-len, "err=TagParity "); in aurora_l2_check()
462 len += scnprintf(msg+len, size-len, "addr=0x%x ", addr_cap & AURORA_ERR_ADDR_CAP_ADDR_MASK); in aurora_l2_check()
463 …len += scnprintf(msg+len, size-len, "index=0x%x ", (way_cap & AURORA_ERR_WAY_IDX_MSK) >> AURORA_ER… in aurora_l2_check()
464 …len += scnprintf(msg+len, size-len, "way=0x%x", (way_cap & AURORA_ERR_WAY_CAP_WAY_MASK) >> AURORA_… in aurora_l2_check()
467 writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG); in aurora_l2_check()
471 cnt_ue--; in aurora_l2_check()
472 edac_device_handle_ue(dci, 0, 0, drvdata->msg); in aurora_l2_check()
475 cnt_ce--; in aurora_l2_check()
476 edac_device_handle_ce(dci, 0, 0, drvdata->msg); in aurora_l2_check()
481 while (cnt_ue--) in aurora_l2_check()
483 while (cnt_ce--) in aurora_l2_check()
490 struct aurora_l2_drvdata *drvdata = dci->pvt_info; in aurora_l2_poll()
500 {.compatible = "marvell,aurora-system-cache",},
515 dev_err(&pdev->dev, "Unable to map regs\n"); in aurora_l2_probe()
521 dev_warn(&pdev->dev, "tag parity is not enabled\n"); in aurora_l2_probe()
523 dev_warn(&pdev->dev, "data ECC is not enabled\n"); in aurora_l2_probe()
528 return -ENOMEM; in aurora_l2_probe()
530 drvdata = dci->pvt_info; in aurora_l2_probe()
531 drvdata->base = base; in aurora_l2_probe()
532 dci->dev = &pdev->dev; in aurora_l2_probe()
535 id = of_match_device(aurora_l2_of_match, &pdev->dev); in aurora_l2_probe()
536 dci->edac_check = aurora_l2_poll; in aurora_l2_probe()
537 dci->mod_name = pdev->dev.driver->name; in aurora_l2_probe()
538 dci->ctl_name = id ? id->compatible : "unknown"; in aurora_l2_probe()
539 dci->dev_name = dev_name(&pdev->dev); in aurora_l2_probe()
542 writel(AURORA_ERR_CNT_CLR, drvdata->base + AURORA_ERR_CNT_REG); in aurora_l2_probe()
543 writel(AURORA_ERR_ATTR_CAP_VALID, drvdata->base + AURORA_ERR_ATTR_CAP_REG); in aurora_l2_probe()
547 return -EINVAL; in aurora_l2_probe()
551 drvdata->debugfs = edac_debugfs_create_dir(dev_name(&pdev->dev)); in aurora_l2_probe()
552 if (drvdata->debugfs) { in aurora_l2_probe()
554 drvdata->debugfs, in aurora_l2_probe()
555 &drvdata->inject_addr); in aurora_l2_probe()
557 drvdata->debugfs, in aurora_l2_probe()
558 &drvdata->inject_mask); in aurora_l2_probe()
560 drvdata->debugfs, &drvdata->inject_ctl); in aurora_l2_probe()
571 struct aurora_l2_drvdata *drvdata = dci->pvt_info; in aurora_l2_remove()
573 edac_debugfs_remove_recursive(drvdata->debugfs); in aurora_l2_remove()
575 edac_device_del_device(&pdev->dev); in aurora_l2_remove()
601 return -EBUSY; in armada_xp_edac_init()