Lines Matching +full:x +full:- +full:ecc
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018, Intel Corporation. All rights reserved
4 * Copyright Altera Corporation (C) 2014-2016. All rights reserved.
5 * Copyright 2011-2012 Calxeda, Inc.
12 #include <linux/firmware/intel/stratix10-smc.h>
17 #include <linux/mfd/altera-sysmgr.h>
84 struct altr_sdram_mc_data *drvdata = mci->pvt_info; in altr_sdram_mc_err_handler()
85 const struct altr_sdram_prv_data *priv = drvdata->data; in altr_sdram_mc_err_handler()
88 regmap_read(drvdata->mc_vbase, priv->ecc_stat_offset, &status); in altr_sdram_mc_err_handler()
90 if (status & priv->ecc_stat_ue_mask) { in altr_sdram_mc_err_handler()
91 regmap_read(drvdata->mc_vbase, priv->ecc_daddr_offset, in altr_sdram_mc_err_handler()
93 if (priv->ecc_uecnt_offset) in altr_sdram_mc_err_handler()
94 regmap_read(drvdata->mc_vbase, priv->ecc_uecnt_offset, in altr_sdram_mc_err_handler()
96 panic("\nEDAC: [%d Uncorrectable errors @ 0x%08X]\n", in altr_sdram_mc_err_handler()
99 if (status & priv->ecc_stat_ce_mask) { in altr_sdram_mc_err_handler()
100 regmap_read(drvdata->mc_vbase, priv->ecc_saddr_offset, in altr_sdram_mc_err_handler()
102 if (priv->ecc_cecnt_offset) in altr_sdram_mc_err_handler()
103 regmap_read(drvdata->mc_vbase, priv->ecc_cecnt_offset, in altr_sdram_mc_err_handler()
108 0, 0, -1, mci->ctl_name, ""); in altr_sdram_mc_err_handler()
110 regmap_write(drvdata->mc_vbase, priv->ecc_irq_clr_offset, in altr_sdram_mc_err_handler()
111 priv->ecc_irq_clr_mask); in altr_sdram_mc_err_handler()
122 struct mem_ctl_info *mci = file->private_data; in altr_sdr_mc_err_inject_write()
123 struct altr_sdram_mc_data *drvdata = mci->pvt_info; in altr_sdr_mc_err_inject_write()
124 const struct altr_sdram_prv_data *priv = drvdata->data; in altr_sdr_mc_err_inject_write()
129 ptemp = dma_alloc_coherent(mci->pdev, 16, &dma_handle, GFP_KERNEL); in altr_sdr_mc_err_inject_write()
133 return -ENOMEM; in altr_sdr_mc_err_inject_write()
136 regmap_read(drvdata->mc_vbase, priv->ce_ue_trgr_offset, in altr_sdr_mc_err_inject_write()
138 read_reg &= ~(priv->ce_set_mask | priv->ue_set_mask); in altr_sdr_mc_err_inject_write()
148 regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset, in altr_sdr_mc_err_inject_write()
149 (read_reg | priv->ue_set_mask)); in altr_sdr_mc_err_inject_write()
155 regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset, in altr_sdr_mc_err_inject_write()
156 (read_reg | priv->ce_set_mask)); in altr_sdr_mc_err_inject_write()
164 regmap_write(drvdata->mc_vbase, priv->ce_ue_trgr_offset, read_reg); in altr_sdr_mc_err_inject_write()
179 edac_printk(KERN_ALERT, EDAC_MC, "Read Data [0x%X, 0x%X]\n", in altr_sdr_mc_err_inject_write()
182 dma_free_coherent(mci->pdev, 16, ptemp, dma_handle); in altr_sdr_mc_err_inject_write()
198 if (!mci->debugfs) in altr_sdr_mc_create_debugfs_nodes()
201 edac_debugfs_create_file("altr_trigger", S_IWUSR, mci->debugfs, mci, in altr_sdr_mc_create_debugfs_nodes()
220 edac_dbg(0, "total_mem 0x%lx\n", total_mem); in get_total_mem()
225 { .compatible = "altr,sdram-edac", .data = &c5_data},
226 { .compatible = "altr,sdram-edac-a10", .data = &a10_data},
237 return -ENODEV; in a10_init()
243 return -ENODEV; in a10_init()
255 dev_name(&pdev->dev))) { in a10_unmask_irq()
258 return -EBUSY; in a10_unmask_irq()
266 ret = -ENOMEM; in a10_unmask_irq()
293 mc_vbase = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, in altr_sdram_probe()
294 "altr,sdr-syscon"); in altr_sdram_probe()
297 "regmap for altr,sdr-syscon lookup failed.\n"); in altr_sdram_probe()
298 return -ENODEV; in altr_sdram_probe()
302 priv = device_get_match_data(&pdev->dev); in altr_sdram_probe()
304 /* Validate the SDRAM controller has ECC enabled */ in altr_sdram_probe()
305 if (regmap_read(mc_vbase, priv->ecc_ctrl_offset, &read_reg) || in altr_sdram_probe()
306 ((read_reg & priv->ecc_ctl_en_mask) != priv->ecc_ctl_en_mask)) { in altr_sdram_probe()
308 "No ECC/ECC disabled [0x%08X]\n", read_reg); in altr_sdram_probe()
309 return -ENODEV; in altr_sdram_probe()
316 return -ENODEV; in altr_sdram_probe()
320 if (regmap_update_bits(mc_vbase, priv->ecc_irq_en_offset, in altr_sdram_probe()
321 priv->ecc_irq_en_mask, 0)) { in altr_sdram_probe()
323 "Error disabling SDRAM ECC IRQ\n"); in altr_sdram_probe()
324 return -ENODEV; in altr_sdram_probe()
328 if (regmap_update_bits(mc_vbase, priv->ecc_cnt_rst_offset, in altr_sdram_probe()
329 priv->ecc_cnt_rst_mask, in altr_sdram_probe()
330 priv->ecc_cnt_rst_mask)) { in altr_sdram_probe()
332 "Error clearing SDRAM ECC count\n"); in altr_sdram_probe()
333 return -ENODEV; in altr_sdram_probe()
336 if (regmap_update_bits(mc_vbase, priv->ecc_cnt_rst_offset, in altr_sdram_probe()
337 priv->ecc_cnt_rst_mask, 0)) { in altr_sdram_probe()
339 "Error clearing SDRAM ECC count\n"); in altr_sdram_probe()
340 return -ENODEV; in altr_sdram_probe()
362 return -ENOMEM; in altr_sdram_probe()
364 mci->pdev = &pdev->dev; in altr_sdram_probe()
365 drvdata = mci->pvt_info; in altr_sdram_probe()
366 drvdata->mc_vbase = mc_vbase; in altr_sdram_probe()
367 drvdata->data = priv; in altr_sdram_probe()
370 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL)) { in altr_sdram_probe()
373 res = -ENOMEM; in altr_sdram_probe()
377 mci->mtype_cap = MEM_FLAG_DDR3; in altr_sdram_probe()
378 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED; in altr_sdram_probe()
379 mci->edac_cap = EDAC_FLAG_SECDED; in altr_sdram_probe()
380 mci->mod_name = EDAC_MOD_STR; in altr_sdram_probe()
381 mci->ctl_name = dev_name(&pdev->dev); in altr_sdram_probe()
382 mci->scrub_mode = SCRUB_SW_SRC; in altr_sdram_probe()
383 mci->dev_name = dev_name(&pdev->dev); in altr_sdram_probe()
385 dimm = *mci->dimms; in altr_sdram_probe()
386 dimm->nr_pages = ((mem_size - 1) >> PAGE_SHIFT) + 1; in altr_sdram_probe()
387 dimm->grain = 8; in altr_sdram_probe()
388 dimm->dtype = DEV_X8; in altr_sdram_probe()
389 dimm->mtype = MEM_DDR3; in altr_sdram_probe()
390 dimm->edac_mode = EDAC_SECDED; in altr_sdram_probe()
397 if (of_machine_is_compatible("altr,socfpga-arria10")) { in altr_sdram_probe()
403 res = devm_request_irq(&pdev->dev, irq2, in altr_sdram_probe()
405 IRQF_SHARED, dev_name(&pdev->dev), mci); in altr_sdram_probe()
409 res = -ENODEV; in altr_sdram_probe()
420 res = devm_request_irq(&pdev->dev, irq, altr_sdram_mc_err_handler, in altr_sdram_probe()
421 irqflags, dev_name(&pdev->dev), mci); in altr_sdram_probe()
425 res = -ENODEV; in altr_sdram_probe()
429 /* Infrastructure ready - enable the IRQ */ in altr_sdram_probe()
430 if (regmap_update_bits(drvdata->mc_vbase, priv->ecc_irq_en_offset, in altr_sdram_probe()
431 priv->ecc_irq_en_mask, priv->ecc_irq_en_mask)) { in altr_sdram_probe()
433 "Error enabling SDRAM ECC IRQ\n"); in altr_sdram_probe()
434 res = -ENODEV; in altr_sdram_probe()
440 devres_close_group(&pdev->dev, NULL); in altr_sdram_probe()
445 edac_mc_del_mc(&pdev->dev); in altr_sdram_probe()
447 devres_release_group(&pdev->dev, NULL); in altr_sdram_probe()
460 edac_mc_del_mc(&pdev->dev); in altr_sdram_remove()
474 return -EPERM; in altr_sdram_prepare()
503 { .compatible = "altr,socfpga-ecc-manager" },
510 of_platform_populate(pdev->dev.of_node, altr_edac_device_of_match, in altr_edac_probe()
511 NULL, &pdev->dev); in altr_edac_probe()
551 struct altr_edac_device_dev *drvdata = dci->pvt_info; in altr_edac_device_handler()
552 const struct edac_device_prv_data *priv = drvdata->data; in altr_edac_device_handler()
554 if (irq == drvdata->sb_irq) { in altr_edac_device_handler()
555 if (priv->ce_clear_mask) in altr_edac_device_handler()
556 writel(priv->ce_clear_mask, drvdata->base); in altr_edac_device_handler()
557 edac_device_handle_ce(dci, 0, 0, drvdata->edac_dev_name); in altr_edac_device_handler()
559 } else if (irq == drvdata->db_irq) { in altr_edac_device_handler()
560 if (priv->ue_clear_mask) in altr_edac_device_handler()
561 writel(priv->ue_clear_mask, drvdata->base); in altr_edac_device_handler()
562 edac_device_handle_ue(dci, 0, 0, drvdata->edac_dev_name); in altr_edac_device_handler()
581 struct edac_device_ctl_info *edac_dci = file->private_data; in altr_edac_device_trig()
582 struct altr_edac_device_dev *drvdata = edac_dci->pvt_info; in altr_edac_device_trig()
583 const struct edac_device_prv_data *priv = drvdata->data; in altr_edac_device_trig()
584 void *generic_ptr = edac_dci->dev; in altr_edac_device_trig()
587 return -EFAULT; in altr_edac_device_trig()
589 if (!priv->alloc_mem) in altr_edac_device_trig()
590 return -ENOMEM; in altr_edac_device_trig()
596 ptemp = priv->alloc_mem(priv->trig_alloc_sz, &generic_ptr); in altr_edac_device_trig()
600 return -ENOMEM; in altr_edac_device_trig()
604 error_mask = priv->ue_set_mask; in altr_edac_device_trig()
606 error_mask = priv->ce_set_mask; in altr_edac_device_trig()
609 "Trigger Error Mask (0x%X)\n", error_mask); in altr_edac_device_trig()
612 /* write ECC corrupted data out. */ in altr_edac_device_trig()
613 for (i = 0; i < (priv->trig_alloc_sz / sizeof(*ptemp)); i++) { in altr_edac_device_trig()
617 result = -1; in altr_edac_device_trig()
618 /* Toggle Error bit (it is latched), leave ECC enabled */ in altr_edac_device_trig()
619 writel(error_mask, (drvdata->base + priv->set_err_ofst)); in altr_edac_device_trig()
620 writel(priv->ecc_enable_mask, (drvdata->base + in altr_edac_device_trig()
621 priv->set_err_ofst)); in altr_edac_device_trig()
631 /* Read out written data. ECC error caused here */ in altr_edac_device_trig()
637 if (priv->free_mem) in altr_edac_device_trig()
638 priv->free_mem(ptemp, priv->trig_alloc_sz, generic_ptr); in altr_edac_device_trig()
672 struct altr_edac_device_dev *drvdata = edac_dci->pvt_info; in altr_create_edacdev_dbgfs()
677 drvdata->debugfs_dir = edac_debugfs_create_dir(drvdata->edac_dev_name); in altr_create_edacdev_dbgfs()
678 if (!drvdata->debugfs_dir) in altr_create_edacdev_dbgfs()
682 drvdata->debugfs_dir, edac_dci, in altr_create_edacdev_dbgfs()
683 priv->inject_fops)) in altr_create_edacdev_dbgfs()
684 debugfs_remove_recursive(drvdata->debugfs_dir); in altr_create_edacdev_dbgfs()
689 { .compatible = "altr,socfpga-l2-ecc", .data = &l2ecc_data },
692 { .compatible = "altr,socfpga-ocram-ecc", .data = &ocramecc_data },
701 * various Altera memory devices such as the L2 cache ECC and
702 * OCRAM ECC as well as the memories for other peripherals.
712 struct device_node *np = pdev->dev.of_node; in altr_edac_device_probe()
713 char *ecc_name = (char *)np->name; in altr_edac_device_probe()
716 if (!devres_open_group(&pdev->dev, NULL, GFP_KERNEL)) { in altr_edac_device_probe()
719 return -ENOMEM; in altr_edac_device_probe()
726 res = -ENODEV; in altr_edac_device_probe()
730 if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r), in altr_edac_device_probe()
731 dev_name(&pdev->dev))) { in altr_edac_device_probe()
734 res = -EBUSY; in altr_edac_device_probe()
744 res = -ENOMEM; in altr_edac_device_probe()
748 drvdata = dci->pvt_info; in altr_edac_device_probe()
749 dci->dev = &pdev->dev; in altr_edac_device_probe()
751 drvdata->edac_dev_name = ecc_name; in altr_edac_device_probe()
753 drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r)); in altr_edac_device_probe()
754 if (!drvdata->base) { in altr_edac_device_probe()
755 res = -ENOMEM; in altr_edac_device_probe()
760 drvdata->data = of_match_node(altr_edac_device_of_match, np)->data; in altr_edac_device_probe()
763 if (drvdata->data->setup) { in altr_edac_device_probe()
764 res = drvdata->data->setup(drvdata); in altr_edac_device_probe()
769 drvdata->sb_irq = platform_get_irq(pdev, 0); in altr_edac_device_probe()
770 res = devm_request_irq(&pdev->dev, drvdata->sb_irq, in altr_edac_device_probe()
772 0, dev_name(&pdev->dev), dci); in altr_edac_device_probe()
776 drvdata->db_irq = platform_get_irq(pdev, 1); in altr_edac_device_probe()
777 res = devm_request_irq(&pdev->dev, drvdata->db_irq, in altr_edac_device_probe()
779 0, dev_name(&pdev->dev), dci); in altr_edac_device_probe()
783 dci->mod_name = "Altera ECC Manager"; in altr_edac_device_probe()
784 dci->dev_name = drvdata->edac_dev_name; in altr_edac_device_probe()
790 altr_create_edacdev_dbgfs(dci, drvdata->data); in altr_edac_device_probe()
792 devres_close_group(&pdev->dev, NULL); in altr_edac_device_probe()
799 devres_release_group(&pdev->dev, NULL); in altr_edac_device_probe()
809 struct altr_edac_device_dev *drvdata = dci->pvt_info; in altr_edac_device_remove()
811 debugfs_remove_recursive(drvdata->debugfs_dir); in altr_edac_device_remove()
812 edac_device_del_device(&pdev->dev); in altr_edac_device_remove()
826 /******************* Arria10 Device ECC Shared Functions *****************/
829 * Test for memory's ECC dependencies upon entry because platform specific
830 * startup should have initialized the memory and enabled the ECC.
831 * Can't turn on ECC here because accessing un-initialized memory will
837 void __iomem *base = device->base; in altr_check_ecc_deps()
838 const struct edac_device_prv_data *prv = device->data; in altr_check_ecc_deps()
840 if (readl(base + prv->ecc_en_ofst) & prv->ecc_enable_mask) in altr_check_ecc_deps()
844 "%s: No ECC present or ECC disabled.\n", in altr_check_ecc_deps()
845 device->edac_dev_name); in altr_check_ecc_deps()
846 return -ENODEV; in altr_check_ecc_deps()
852 void __iomem *base = dci->base; in altr_edac_a10_ecc_irq()
854 if (irq == dci->sb_irq) { in altr_edac_a10_ecc_irq()
857 edac_device_handle_ce(dci->edac_dev, 0, 0, dci->edac_dev_name); in altr_edac_a10_ecc_irq()
860 } else if (irq == dci->db_irq) { in altr_edac_a10_ecc_irq()
863 edac_device_handle_ue(dci->edac_dev, 0, 0, dci->edac_dev_name); in altr_edac_a10_ecc_irq()
864 if (dci->data->panic) in altr_edac_a10_ecc_irq()
883 return -ENODEV; in a10_get_irq_mask()
912 * This function uses the memory initialization block in the Arria10 ECC
913 * controller to initialize/clear the entire memory data and ECC data.
932 while (limit--) { in altr_init_memory_port()
939 ret = -EBUSY; in altr_init_memory_port()
941 /* Clear any pending ECC interrupts */ in altr_init_memory_port()
957 ecc_name = (char *)np->name; in altr_init_a10_ecc_block()
959 /* Get the ECC Manager - parent of the device EDACs */ in altr_init_a10_ecc_block()
964 "altr,sysmgr-syscon"); in altr_init_a10_ecc_block()
969 "Unable to get syscon altr,sysmgr-syscon\n"); in altr_init_a10_ecc_block()
970 return -ENODEV; in altr_init_a10_ecc_block()
973 /* Map the ECC Block */ in altr_init_a10_ecc_block()
977 "Unable to map %s ECC block\n", ecc_name); in altr_init_a10_ecc_block()
978 return -ENODEV; in altr_init_a10_ecc_block()
981 /* Disable ECC */ in altr_init_a10_ecc_block()
989 /* Use HW initialization block to initialize memory for ECC */ in altr_init_a10_ecc_block()
993 "ECC: cannot init %s PORTA memory\n", ecc_name); in altr_init_a10_ecc_block()
1001 "ECC: cannot init %s PORTB memory\n", in altr_init_a10_ecc_block()
1007 /* Enable ECC */ in altr_init_a10_ecc_block()
1028 "altr,socfpga-a10-ecc-manager"); in altr_init_a10_ecc_device_type()
1030 edac_printk(KERN_ERR, EDAC_DEVICE, "ECC Manager not found\n"); in altr_init_a10_ecc_device_type()
1031 return -ENODEV; in altr_init_a10_ecc_device_type()
1056 prv = pdev_id->data; in altr_init_a10_ecc_device_type()
1061 prv->ecc_enable_mask, 0); in altr_init_a10_ecc_device_type()
1073 * A legacy U-Boot bug only enabled memory mapped access to the ECC Enable
1074 * register if ECC is enabled. Linux checks the ECC Enable register to
1075 * determine ECC status.
1076 * Use an SMC call (which always works) to determine ECC enablement.
1080 const struct edac_device_prv_data *prv = device->data; in altr_s10_sdram_check_ecc_deps()
1088 np = of_find_compatible_node(NULL, NULL, "altr,sdr-ctl"); in altr_s10_sdram_check_ecc_deps()
1095 sdram_ecc_addr = (unsigned long)sdram_addr + prv->ecc_en_ofst; in altr_s10_sdram_check_ecc_deps()
1100 if (!ret && (read_reg & prv->ecc_enable_mask)) in altr_s10_sdram_check_ecc_deps()
1105 "%s: No ECC present or ECC disabled.\n", in altr_s10_sdram_check_ecc_deps()
1106 device->edac_dev_name); in altr_s10_sdram_check_ecc_deps()
1107 return -ENODEV; in altr_s10_sdram_check_ecc_deps()
1134 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-ocram-ecc"); in ocram_alloc_mem()
1180 void __iomem *base = device->base; in altr_check_ocram_deps_init()
1191 * ECC must be explicitly re-enabled in the control register. in altr_check_ocram_deps_init()
1201 return -ENODEV; in altr_check_ocram_deps_init()
1252 * L2 cache for readback test (which causes ECC error). in l2_alloc_mem()
1269 * Test for L2 cache ECC dependencies upon entry because
1271 * memory and enabled the ECC.
1272 * Bail if ECC is not enabled.
1277 void __iomem *base = device->base; in altr_l2_check_deps()
1278 const struct edac_device_prv_data *prv = device->data; in altr_l2_check_deps()
1280 if ((readl(base) & prv->ecc_enable_mask) == in altr_l2_check_deps()
1281 prv->ecc_enable_mask) in altr_l2_check_deps()
1285 "L2: No ECC present, or ECC disabled\n"); in altr_l2_check_deps()
1286 return -ENODEV; in altr_l2_check_deps()
1293 if (irq == dci->sb_irq) { in altr_edac_a10_l2_irq()
1294 regmap_write(dci->edac->ecc_mgr_map, in altr_edac_a10_l2_irq()
1297 edac_device_handle_ce(dci->edac_dev, 0, 0, dci->edac_dev_name); in altr_edac_a10_l2_irq()
1300 } else if (irq == dci->db_irq) { in altr_edac_a10_l2_irq()
1301 regmap_write(dci->edac->ecc_mgr_map, in altr_edac_a10_l2_irq()
1304 edac_device_handle_ue(dci->edac_dev, 0, 0, dci->edac_dev_name); in altr_edac_a10_l2_irq()
1355 ret = altr_init_a10_ecc_device_type("altr,socfpga-eth-mac-ecc"); in socfpga_init_ethernet_ecc()
1385 ret = altr_init_a10_ecc_device_type("altr,socfpga-nand-ecc"); in socfpga_init_nand_ecc()
1415 ret = altr_init_a10_ecc_device_type("altr,socfpga-dma-ecc"); in socfpga_init_dma_ecc()
1445 ret = altr_init_a10_ecc_device_type("altr,socfpga-usb-ecc"); in socfpga_init_usb_ecc()
1475 ret = altr_init_a10_ecc_device_type("altr,socfpga-qspi-ecc"); in socfpga_init_qspi_ecc()
1506 char *ecc_name = "sdmmcb-ecc"; in altr_portb_setup()
1515 np = of_find_compatible_node(NULL, NULL, "altr,socfpga-sdmmc-ecc"); in altr_portb_setup()
1518 return -ENODEV; in altr_portb_setup()
1529 return -ENOMEM; in altr_portb_setup()
1533 altdev = dci->pvt_info; in altr_portb_setup()
1536 if (!devres_open_group(&altdev->ddev, altr_portb_setup, GFP_KERNEL)) in altr_portb_setup()
1537 return -ENOMEM; in altr_portb_setup()
1540 altdev->edac_dev_name = ecc_name; in altr_portb_setup()
1541 altdev->edac_idx = edac_idx; in altr_portb_setup()
1542 altdev->edac_dev = dci; in altr_portb_setup()
1543 altdev->data = prv; in altr_portb_setup()
1544 dci->dev = &altdev->ddev; in altr_portb_setup()
1545 dci->ctl_name = "Altera ECC Manager"; in altr_portb_setup()
1546 dci->mod_name = ecc_name; in altr_portb_setup()
1547 dci->dev_name = ecc_name; in altr_portb_setup()
1550 * Update the PortB IRQs - A10 has 4, S10 has 2, Index accordingly in altr_portb_setup()
1556 altdev->sb_irq = irq_of_parse_and_map(np, 1); in altr_portb_setup()
1558 altdev->sb_irq = irq_of_parse_and_map(np, 2); in altr_portb_setup()
1560 if (!altdev->sb_irq) { in altr_portb_setup()
1562 rc = -ENODEV; in altr_portb_setup()
1565 rc = devm_request_irq(&altdev->ddev, altdev->sb_irq, in altr_portb_setup()
1566 prv->ecc_irq_handler, in altr_portb_setup()
1576 rc = of_property_read_u32_index(np, "interrupts", 1, &altdev->db_irq); in altr_portb_setup()
1583 altdev->db_irq = irq_of_parse_and_map(np, 3); in altr_portb_setup()
1584 if (!altdev->db_irq) { in altr_portb_setup()
1586 rc = -ENODEV; in altr_portb_setup()
1589 rc = devm_request_irq(&altdev->ddev, altdev->db_irq, in altr_portb_setup()
1590 prv->ecc_irq_handler, in altr_portb_setup()
1603 rc = -ENOMEM; in altr_portb_setup()
1608 list_add(&altdev->next, &altdev->edac->a10_ecc_devices); in altr_portb_setup()
1610 devres_remove_group(&altdev->ddev, altr_portb_setup); in altr_portb_setup()
1616 devres_release_group(&altdev->ddev, altr_portb_setup); in altr_portb_setup()
1624 int rc = -ENODEV; in socfpga_init_sdmmc_ecc()
1627 child = of_find_compatible_node(NULL, NULL, "altr,socfpga-sdmmc-ecc"); in socfpga_init_sdmmc_ecc()
1629 return -ENODEV; in socfpga_init_sdmmc_ecc()
1654 void __iomem *base = ad->base; in altr_edac_a10_ecc_irq_portb()
1655 const struct edac_device_prv_data *priv = ad->data; in altr_edac_a10_ecc_irq_portb()
1657 if (irq == ad->sb_irq) { in altr_edac_a10_ecc_irq_portb()
1658 writel(priv->ce_clear_mask, in altr_edac_a10_ecc_irq_portb()
1660 edac_device_handle_ce(ad->edac_dev, 0, 0, ad->edac_dev_name); in altr_edac_a10_ecc_irq_portb()
1662 } else if (irq == ad->db_irq) { in altr_edac_a10_ecc_irq_portb()
1663 writel(priv->ue_clear_mask, in altr_edac_a10_ecc_irq_portb()
1665 edac_device_handle_ue(ad->edac_dev, 0, 0, ad->edac_dev_name); in altr_edac_a10_ecc_irq_portb()
1705 { .compatible = "altr,socfpga-a10-l2-ecc", .data = &a10_l2ecc_data },
1708 { .compatible = "altr,socfpga-a10-ocram-ecc",
1712 { .compatible = "altr,socfpga-eth-mac-ecc",
1716 { .compatible = "altr,socfpga-nand-ecc", .data = &a10_nandecc_data },
1719 { .compatible = "altr,socfpga-dma-ecc", .data = &a10_dmaecc_data },
1722 { .compatible = "altr,socfpga-usb-ecc", .data = &a10_usbecc_data },
1725 { .compatible = "altr,socfpga-qspi-ecc", .data = &a10_qspiecc_data },
1728 { .compatible = "altr,socfpga-sdmmc-ecc", .data = &a10_sdmmcecca_data },
1731 { .compatible = "altr,sdram-edac-s10", .data = &s10_sdramecc_data },
1739 * because 2 IRQs are shared among the all ECC peripherals. The ECC
1748 struct edac_device_ctl_info *edac_dci = file->private_data; in altr_edac_a10_device_trig()
1749 struct altr_edac_device_dev *drvdata = edac_dci->pvt_info; in altr_edac_a10_device_trig()
1750 const struct edac_device_prv_data *priv = drvdata->data; in altr_edac_a10_device_trig()
1751 void __iomem *set_addr = (drvdata->base + priv->set_err_ofst); in altr_edac_a10_device_trig()
1756 return -EFAULT; in altr_edac_a10_device_trig()
1760 writew(priv->ue_set_mask, set_addr); in altr_edac_a10_device_trig()
1762 writew(priv->ce_set_mask, set_addr); in altr_edac_a10_device_trig()
1780 struct edac_device_ctl_info *edac_dci = file->private_data; in altr_edac_a10_device_trig2()
1781 struct altr_edac_device_dev *drvdata = edac_dci->pvt_info; in altr_edac_a10_device_trig2()
1782 const struct edac_device_prv_data *priv = drvdata->data; in altr_edac_a10_device_trig2()
1783 void __iomem *set_addr = (drvdata->base + priv->set_err_ofst); in altr_edac_a10_device_trig2()
1788 return -EFAULT; in altr_edac_a10_device_trig2()
1792 writew(priv->ue_set_mask, set_addr); in altr_edac_a10_device_trig2()
1795 writel(ECC_WORD_WRITE, drvdata->base + ECC_BLK_DBYTECTRL_OFST); in altr_edac_a10_device_trig2()
1797 writel(0, drvdata->base + ECC_BLK_ADDRESS_OFST); in altr_edac_a10_device_trig2()
1798 /* Setup accctrl to read & ecc & data override */ in altr_edac_a10_device_trig2()
1799 writel(ECC_READ_EDOVR, drvdata->base + ECC_BLK_ACCCTRL_OFST); in altr_edac_a10_device_trig2()
1801 writel(ECC_XACT_KICK, drvdata->base + ECC_BLK_STARTACC_OFST); in altr_edac_a10_device_trig2()
1803 writel(readl(drvdata->base + ECC_BLK_RDATA0_OFST) ^ 0x1, in altr_edac_a10_device_trig2()
1804 drvdata->base + ECC_BLK_WDATA0_OFST); in altr_edac_a10_device_trig2()
1805 writel(readl(drvdata->base + ECC_BLK_RDATA1_OFST), in altr_edac_a10_device_trig2()
1806 drvdata->base + ECC_BLK_WDATA1_OFST); in altr_edac_a10_device_trig2()
1807 writel(readl(drvdata->base + ECC_BLK_RDATA2_OFST), in altr_edac_a10_device_trig2()
1808 drvdata->base + ECC_BLK_WDATA2_OFST); in altr_edac_a10_device_trig2()
1809 writel(readl(drvdata->base + ECC_BLK_RDATA3_OFST), in altr_edac_a10_device_trig2()
1810 drvdata->base + ECC_BLK_WDATA3_OFST); in altr_edac_a10_device_trig2()
1812 /* Copy Read ECC to Write ECC */ in altr_edac_a10_device_trig2()
1813 writel(readl(drvdata->base + ECC_BLK_RECC0_OFST), in altr_edac_a10_device_trig2()
1814 drvdata->base + ECC_BLK_WECC0_OFST); in altr_edac_a10_device_trig2()
1815 writel(readl(drvdata->base + ECC_BLK_RECC1_OFST), in altr_edac_a10_device_trig2()
1816 drvdata->base + ECC_BLK_WECC1_OFST); in altr_edac_a10_device_trig2()
1817 /* Setup accctrl to write & ecc override & data override */ in altr_edac_a10_device_trig2()
1818 writel(ECC_WRITE_EDOVR, drvdata->base + ECC_BLK_ACCCTRL_OFST); in altr_edac_a10_device_trig2()
1820 writel(ECC_XACT_KICK, drvdata->base + ECC_BLK_STARTACC_OFST); in altr_edac_a10_device_trig2()
1821 /* Setup accctrl to read & ecc overwrite & data overwrite */ in altr_edac_a10_device_trig2()
1822 writel(ECC_READ_EDOVR, drvdata->base + ECC_BLK_ACCCTRL_OFST); in altr_edac_a10_device_trig2()
1824 writel(ECC_XACT_KICK, drvdata->base + ECC_BLK_STARTACC_OFST); in altr_edac_a10_device_trig2()
1842 dberr = (irq == edac->db_irq) ? 1 : 0; in altr_edac_a10_irq_handler()
1848 regmap_read(edac->ecc_mgr_map, sm_offset, &irq_status); in altr_edac_a10_irq_handler()
1852 generic_handle_domain_irq(edac->domain, dberr * 32 + bit); in altr_edac_a10_irq_handler()
1863 if (of_device_is_compatible(np, "altr,sdram-edac-s10")) in validate_parent_available()
1867 parent = of_parse_phandle(np, "altr,ecc-parent", 0); in validate_parent_available()
1869 ret = -ENODEV; in validate_parent_available()
1881 parent = of_parse_phandle(np, "altr,sdr-syscon", 0); in get_s10_sdram_edac_resource()
1883 return -ENODEV; in get_s10_sdram_edac_resource()
1896 char *ecc_name = (char *)np->name; in altr_edac_a10_device_add()
1905 return -ENODEV; in altr_edac_a10_device_add()
1908 prv = pdev_id->data; in altr_edac_a10_device_add()
1910 return -ENODEV; in altr_edac_a10_device_add()
1913 return -ENODEV; in altr_edac_a10_device_add()
1915 if (!devres_open_group(edac->dev, altr_edac_a10_device_add, GFP_KERNEL)) in altr_edac_a10_device_add()
1916 return -ENOMEM; in altr_edac_a10_device_add()
1918 if (of_device_is_compatible(np, "altr,sdram-edac-s10")) in altr_edac_a10_device_add()
1936 rc = -ENOMEM; in altr_edac_a10_device_add()
1940 altdev = dci->pvt_info; in altr_edac_a10_device_add()
1941 dci->dev = edac->dev; in altr_edac_a10_device_add()
1942 altdev->edac_dev_name = ecc_name; in altr_edac_a10_device_add()
1943 altdev->edac_idx = edac_idx; in altr_edac_a10_device_add()
1944 altdev->edac = edac; in altr_edac_a10_device_add()
1945 altdev->edac_dev = dci; in altr_edac_a10_device_add()
1946 altdev->data = prv; in altr_edac_a10_device_add()
1947 altdev->ddev = *edac->dev; in altr_edac_a10_device_add()
1948 dci->dev = &altdev->ddev; in altr_edac_a10_device_add()
1949 dci->ctl_name = "Altera ECC Manager"; in altr_edac_a10_device_add()
1950 dci->mod_name = ecc_name; in altr_edac_a10_device_add()
1951 dci->dev_name = ecc_name; in altr_edac_a10_device_add()
1953 altdev->base = devm_ioremap_resource(edac->dev, &res); in altr_edac_a10_device_add()
1954 if (IS_ERR(altdev->base)) { in altr_edac_a10_device_add()
1955 rc = PTR_ERR(altdev->base); in altr_edac_a10_device_add()
1960 if (altdev->data->setup) { in altr_edac_a10_device_add()
1961 rc = altdev->data->setup(altdev); in altr_edac_a10_device_add()
1966 altdev->sb_irq = irq_of_parse_and_map(np, 0); in altr_edac_a10_device_add()
1967 if (!altdev->sb_irq) { in altr_edac_a10_device_add()
1969 rc = -ENODEV; in altr_edac_a10_device_add()
1972 rc = devm_request_irq(edac->dev, altdev->sb_irq, prv->ecc_irq_handler, in altr_edac_a10_device_add()
1982 rc = of_property_read_u32_index(np, "interrupts", 0, &altdev->db_irq); in altr_edac_a10_device_add()
1989 altdev->db_irq = irq_of_parse_and_map(np, 1); in altr_edac_a10_device_add()
1990 if (!altdev->db_irq) { in altr_edac_a10_device_add()
1992 rc = -ENODEV; in altr_edac_a10_device_add()
1995 rc = devm_request_irq(edac->dev, altdev->db_irq, prv->ecc_irq_handler, in altr_edac_a10_device_add()
2006 dev_err(edac->dev, "edac_device_add_device failed\n"); in altr_edac_a10_device_add()
2007 rc = -ENOMEM; in altr_edac_a10_device_add()
2013 list_add(&altdev->next, &edac->a10_ecc_devices); in altr_edac_a10_device_add()
2015 devres_remove_group(edac->dev, altr_edac_a10_device_add); in altr_edac_a10_device_add()
2022 devres_release_group(edac->dev, NULL); in altr_edac_a10_device_add()
2033 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST, in a10_eccmgr_irq_mask()
2034 BIT(d->hwirq)); in a10_eccmgr_irq_mask()
2041 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_CLR_OFST, in a10_eccmgr_irq_unmask()
2042 BIT(d->hwirq)); in a10_eccmgr_irq_unmask()
2048 struct altr_arria10_edac *edac = d->host_data; in a10_eccmgr_irqdomain_map()
2050 irq_set_chip_and_handler(irq, &edac->irq_chip, handle_simple_irq); in a10_eccmgr_irqdomain_map()
2066 /* panic routine issues reboot on non-zero panic_timeout */
2071 * called as a panic notifier to printout ECC error info as part of the panic.
2079 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_ECC_INTSTAT_DERR_OFST, in s10_edac_dberr_handler()
2081 regmap_write(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, dberror); in s10_edac_dberr_handler()
2088 list_for_each(position, &edac->a10_ecc_devices) { in s10_edac_dberr_handler()
2091 if (!(BIT(ed->db_irq) & dberror)) in s10_edac_dberr_handler()
2095 ed->base + ALTR_A10_ECC_INTSTAT_OFST); in s10_edac_dberr_handler()
2096 err_addr = readl(ed->base + ALTR_S10_DERR_ADDRA_OFST); in s10_edac_dberr_handler()
2097 regmap_write(edac->ecc_mgr_map, in s10_edac_dberr_handler()
2100 "EDAC: [Fatal DBE on %s @ 0x%08X]\n", in s10_edac_dberr_handler()
2101 ed->edac_dev_name, err_addr); in s10_edac_dberr_handler()
2120 edac = devm_kzalloc(&pdev->dev, sizeof(*edac), GFP_KERNEL); in altr_edac_a10_probe()
2122 return -ENOMEM; in altr_edac_a10_probe()
2124 edac->dev = &pdev->dev; in altr_edac_a10_probe()
2126 INIT_LIST_HEAD(&edac->a10_ecc_devices); in altr_edac_a10_probe()
2128 edac->ecc_mgr_map = in altr_edac_a10_probe()
2129 altr_sysmgr_regmap_lookup_by_phandle(pdev->dev.of_node, in altr_edac_a10_probe()
2130 "altr,sysmgr-syscon"); in altr_edac_a10_probe()
2132 if (IS_ERR(edac->ecc_mgr_map)) { in altr_edac_a10_probe()
2134 "Unable to get syscon altr,sysmgr-syscon\n"); in altr_edac_a10_probe()
2135 return PTR_ERR(edac->ecc_mgr_map); in altr_edac_a10_probe()
2139 regmap_write(edac->ecc_mgr_map, A10_SYSMGR_ECC_INTMASK_SET_OFST, in altr_edac_a10_probe()
2142 edac->irq_chip.name = pdev->dev.of_node->name; in altr_edac_a10_probe()
2143 edac->irq_chip.irq_mask = a10_eccmgr_irq_mask; in altr_edac_a10_probe()
2144 edac->irq_chip.irq_unmask = a10_eccmgr_irq_unmask; in altr_edac_a10_probe()
2145 edac->domain = irq_domain_create_linear(dev_fwnode(&pdev->dev), 64, &a10_eccmgr_ic_ops, in altr_edac_a10_probe()
2147 if (!edac->domain) { in altr_edac_a10_probe()
2148 dev_err(&pdev->dev, "Error adding IRQ domain\n"); in altr_edac_a10_probe()
2149 return -ENOMEM; in altr_edac_a10_probe()
2152 edac->sb_irq = platform_get_irq(pdev, 0); in altr_edac_a10_probe()
2153 if (edac->sb_irq < 0) in altr_edac_a10_probe()
2154 return edac->sb_irq; in altr_edac_a10_probe()
2156 irq_set_chained_handler_and_data(edac->sb_irq, in altr_edac_a10_probe()
2164 edac->panic_notifier.notifier_call = s10_edac_dberr_handler; in altr_edac_a10_probe()
2166 &edac->panic_notifier); in altr_edac_a10_probe()
2169 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_VAL_OFST, in altr_edac_a10_probe()
2172 regmap_read(edac->ecc_mgr_map, S10_SYSMGR_UE_ADDR_OFST, in altr_edac_a10_probe()
2175 "Previous Boot UE detected[0x%X] @ 0x%X\n", in altr_edac_a10_probe()
2178 regmap_write(edac->ecc_mgr_map, in altr_edac_a10_probe()
2180 regmap_write(edac->ecc_mgr_map, in altr_edac_a10_probe()
2185 edac->db_irq = platform_get_irq(pdev, 1); in altr_edac_a10_probe()
2186 if (edac->db_irq < 0) in altr_edac_a10_probe()
2187 return edac->db_irq; in altr_edac_a10_probe()
2189 irq_set_chained_handler_and_data(edac->db_irq, in altr_edac_a10_probe()
2193 for_each_child_of_node(pdev->dev.of_node, child) { in altr_edac_a10_probe()
2201 else if (of_device_is_compatible(child, "altr,sdram-edac-a10")) in altr_edac_a10_probe()
2202 of_platform_populate(pdev->dev.of_node, in altr_edac_a10_probe()
2204 NULL, &pdev->dev); in altr_edac_a10_probe()
2212 { .compatible = "altr,socfpga-a10-ecc-manager" },
2213 { .compatible = "altr,socfpga-s10-ecc-manager" },