1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/edac.h>
77 	struct al_mc_edac *al_mc = mci->pvt_info;  in handle_ce()
83 	eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT);  in handle_ce()
88 	ecccaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR0);  in handle_ce()
89 	ecccaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_ADDR1);  in handle_ce()
90 	ecccsyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND0);  in handle_ce()
91 	ecccsyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND1);  in handle_ce()
92 	ecccsyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_CE_SYND2);  in handle_ce()
95 		       al_mc->mmio_base + AL_MC_ECC_CLEAR);  in handle_ce()
97 	dev_dbg(mci->pdev, "eccuaddr0=0x%08x eccuaddr1=0x%08x\n",  in handle_ce()
111 	spin_lock_irqsave(&al_mc->lock, flags);  in handle_ce()
113 			     ce_count, 0, 0, 0, 0, 0, -1, mci->ctl_name, msg);  in handle_ce()
114 	spin_unlock_irqrestore(&al_mc->lock, flags);  in handle_ce()
122 	struct al_mc_edac *al_mc = mci->pvt_info;  in handle_ue()
128 	eccerrcnt = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_ERR_COUNT);  in handle_ue()
133 	eccuaddr0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR0);  in handle_ue()
134 	eccuaddr1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_ADDR1);  in handle_ue()
135 	eccusyn0 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND0);  in handle_ue()
136 	eccusyn1 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND1);  in handle_ue()
137 	eccusyn2 = readl_relaxed(al_mc->mmio_base + AL_MC_ECC_UE_SYND2);  in handle_ue()
140 		       al_mc->mmio_base + AL_MC_ECC_CLEAR);  in handle_ue()
142 	dev_dbg(mci->pdev, "eccuaddr0=0x%08x eccuaddr1=0x%08x\n",  in handle_ue()
156 	spin_lock_irqsave(&al_mc->lock, flags);  in handle_ue()
158 			     ue_count, 0, 0, 0, 0, 0, -1, mci->ctl_name, msg);  in handle_ue()
159 	spin_unlock_irqrestore(&al_mc->lock, flags);  in handle_ue()
166 	struct al_mc_edac *al_mc = mci->pvt_info;  in al_mc_edac_check()
168 	if (al_mc->irq_ue <= 0)  in al_mc_edac_check()
171 	if (al_mc->irq_ce <= 0)  in al_mc_edac_check()
228 		dev_err(&pdev->dev, "failed to ioremap memory (%ld)\n",  in al_mc_edac_probe()
239 		return -ENOMEM;  in al_mc_edac_probe()
241 	ret = devm_add_action_or_reset(&pdev->dev, devm_al_mc_edac_free, mci);  in al_mc_edac_probe()
246 	al_mc = mci->pvt_info;  in al_mc_edac_probe()
248 	al_mc->mmio_base = mmio_base;  in al_mc_edac_probe()
250 	al_mc->irq_ue = of_irq_get_byname(pdev->dev.of_node, "ue");  in al_mc_edac_probe()
251 	if (al_mc->irq_ue <= 0)  in al_mc_edac_probe()
252 		dev_dbg(&pdev->dev,  in al_mc_edac_probe()
253 			"no IRQ defined for UE - falling back to polling\n");  in al_mc_edac_probe()
255 	al_mc->irq_ce = of_irq_get_byname(pdev->dev.of_node, "ce");  in al_mc_edac_probe()
256 	if (al_mc->irq_ce <= 0)  in al_mc_edac_probe()
257 		dev_dbg(&pdev->dev,  in al_mc_edac_probe()
258 			"no IRQ defined for CE - falling back to polling\n");  in al_mc_edac_probe()
266 	if (al_mc->irq_ue <= 0 || al_mc->irq_ce <= 0) {  in al_mc_edac_probe()
268 		mci->edac_check = al_mc_edac_check;  in al_mc_edac_probe()
273 	spin_lock_init(&al_mc->lock);  in al_mc_edac_probe()
275 	mci->mtype_cap = MEM_FLAG_DDR3 | MEM_FLAG_DDR4;  in al_mc_edac_probe()
276 	mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;  in al_mc_edac_probe()
277 	mci->edac_cap = EDAC_FLAG_SECDED;  in al_mc_edac_probe()
278 	mci->mod_name = DRV_NAME;  in al_mc_edac_probe()
279 	mci->ctl_name = "al_mc";  in al_mc_edac_probe()
280 	mci->pdev = &pdev->dev;  in al_mc_edac_probe()
281 	mci->scrub_mode = get_scrub_mode(mmio_base);  in al_mc_edac_probe()
283 	dimm = *mci->dimms;  in al_mc_edac_probe()
284 	dimm->grain = 1;  in al_mc_edac_probe()
288 		dev_err(&pdev->dev,  in al_mc_edac_probe()
294 	ret = devm_add_action_or_reset(&pdev->dev, devm_al_mc_edac_del, &pdev->dev);  in al_mc_edac_probe()
298 	if (al_mc->irq_ue > 0) {  in al_mc_edac_probe()
299 		ret = devm_request_irq(&pdev->dev,  in al_mc_edac_probe()
300 				       al_mc->irq_ue,  in al_mc_edac_probe()
303 				       pdev->name,  in al_mc_edac_probe()
306 			dev_err(&pdev->dev,  in al_mc_edac_probe()
308 				al_mc->irq_ue, ret);  in al_mc_edac_probe()
313 	if (al_mc->irq_ce > 0) {  in al_mc_edac_probe()
314 		ret = devm_request_irq(&pdev->dev,  in al_mc_edac_probe()
315 				       al_mc->irq_ce,  in al_mc_edac_probe()
318 				       pdev->name,  in al_mc_edac_probe()
321 			dev_err(&pdev->dev,  in al_mc_edac_probe()
323 				al_mc->irq_ce, ret);  in al_mc_edac_probe()
332 	{ .compatible = "amazon,al-mc-edac", },
350 MODULE_DESCRIPTION("Amazon's Annapurna Lab's Memory Controller EDAC Driver");