Lines Matching full:pin
28 * struct zl3073x_dpll_pin - DPLL pin
29 * @list: this DPLL pin list entry
30 * @dpll: DPLL the pin is registered to
33 * @dir: pin direction
34 * @id: pin id
35 * @prio: pin priority <0, 14>
36 * @selectable: pin is selectable in automatic mode
38 * @pin_state: last saved pin state
39 * @phase_offset: last saved pin phase offset
65 * zl3073x_dpll_is_input_pin - check if the pin is input one
66 * @pin: pin to check
68 * Return: true if pin is input, false if pin is output.
71 zl3073x_dpll_is_input_pin(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_is_input_pin() argument
73 return pin->dir == DPLL_PIN_DIRECTION_INPUT; in zl3073x_dpll_is_input_pin()
77 * zl3073x_dpll_is_p_pin - check if the pin is P-pin
78 * @pin: pin to check
80 * Return: true if the pin is P-pin, false if it is N-pin
83 zl3073x_dpll_is_p_pin(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_is_p_pin() argument
85 return zl3073x_is_p_pin(pin->id); in zl3073x_dpll_is_p_pin()
94 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_pin_direction_get() local
96 *direction = pin->dir; in zl3073x_dpll_pin_direction_get()
165 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_esync_get() local
171 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_esync_get()
172 rc = zl3073x_dpll_input_ref_frequency_get(zldpll, pin->id, &ref_freq); in zl3073x_dpll_input_pin_esync_get()
207 /* If the pin supports esync control expose its range but only in zl3073x_dpll_input_pin_esync_get()
210 if (pin->esync_control && ref_freq > 1) { in zl3073x_dpll_input_pin_esync_get()
230 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_esync_set() local
237 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_esync_set()
280 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_ffo_get() local
282 *ffo = pin->freq_offset; in zl3073x_dpll_input_pin_ffo_get()
295 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_frequency_get() local
301 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_frequency_get()
318 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_frequency_set() local
331 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_frequency_set()
524 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_phase_offset_get() local
534 /* Report phase offset only for currently connected pin if the phase in zl3073x_dpll_input_pin_phase_offset_get()
537 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_phase_offset_get()
544 /* Get this pin monitor status */ in zl3073x_dpll_input_pin_phase_offset_get()
549 /* Report phase offset only if the input pin signal is present */ in zl3073x_dpll_input_pin_phase_offset_get()
556 ref_phase = pin->phase_offset; in zl3073x_dpll_input_pin_phase_offset_get()
601 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_phase_adjust_get() local
609 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_phase_adjust_get()
641 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_phase_adjust_set() local
654 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_phase_adjust_set()
671 * zl3073x_dpll_ref_prio_get - get priority for given input pin
672 * @pin: pointer to pin
675 * Reads current priority for the given input pin and stores the value
681 zl3073x_dpll_ref_prio_get(struct zl3073x_dpll_pin *pin, u8 *prio) in zl3073x_dpll_ref_prio_get() argument
683 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_ref_prio_get()
696 /* Read reference priority - one value for P&N pins (4 bits/pin) */ in zl3073x_dpll_ref_prio_get()
697 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_ref_prio_get()
703 /* Select nibble according pin type */ in zl3073x_dpll_ref_prio_get()
704 if (zl3073x_dpll_is_p_pin(pin)) in zl3073x_dpll_ref_prio_get()
713 * zl3073x_dpll_ref_prio_set - set priority for given input pin
714 * @pin: pointer to pin
717 * Sets priority for the given input pin.
722 zl3073x_dpll_ref_prio_set(struct zl3073x_dpll_pin *pin, u8 prio) in zl3073x_dpll_ref_prio_set() argument
724 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_ref_prio_set()
738 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_ref_prio_set()
743 /* Update nibble according pin type */ in zl3073x_dpll_ref_prio_set()
744 if (zl3073x_dpll_is_p_pin(pin)) { in zl3073x_dpll_ref_prio_set()
763 * zl3073x_dpll_ref_state_get - get status for given input pin
764 * @pin: pointer to pin
767 * Checks current status for the given input pin and stores the value
773 zl3073x_dpll_ref_state_get(struct zl3073x_dpll_pin *pin, in zl3073x_dpll_ref_state_get() argument
776 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_ref_state_get()
781 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_ref_state_get()
795 * pin as selectable. in zl3073x_dpll_ref_state_get()
798 pin->selectable) { in zl3073x_dpll_ref_state_get()
814 /* Otherwise report the pin as disconnected */ in zl3073x_dpll_ref_state_get()
828 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_state_on_dpll_get() local
830 return zl3073x_dpll_ref_state_get(pin, state); in zl3073x_dpll_input_pin_state_on_dpll_get()
842 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_state_on_dpll_set() local
851 /* Choose the pin as new selected reference */ in zl3073x_dpll_input_pin_state_on_dpll_set()
852 new_ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_state_on_dpll_set()
858 "Invalid pin state for manual mode"); in zl3073x_dpll_input_pin_state_on_dpll_set()
867 if (pin->selectable) in zl3073x_dpll_input_pin_state_on_dpll_set()
868 return 0; /* Pin is already selectable */ in zl3073x_dpll_input_pin_state_on_dpll_set()
870 /* Restore pin priority in HW */ in zl3073x_dpll_input_pin_state_on_dpll_set()
871 rc = zl3073x_dpll_ref_prio_set(pin, pin->prio); in zl3073x_dpll_input_pin_state_on_dpll_set()
875 /* Mark pin as selectable */ in zl3073x_dpll_input_pin_state_on_dpll_set()
876 pin->selectable = true; in zl3073x_dpll_input_pin_state_on_dpll_set()
878 if (!pin->selectable) in zl3073x_dpll_input_pin_state_on_dpll_set()
879 return 0; /* Pin is already disconnected */ in zl3073x_dpll_input_pin_state_on_dpll_set()
881 /* Set pin priority to none in HW */ in zl3073x_dpll_input_pin_state_on_dpll_set()
882 rc = zl3073x_dpll_ref_prio_set(pin, in zl3073x_dpll_input_pin_state_on_dpll_set()
887 /* Mark pin as non-selectable */ in zl3073x_dpll_input_pin_state_on_dpll_set()
888 pin->selectable = false; in zl3073x_dpll_input_pin_state_on_dpll_set()
891 "Invalid pin state for automatic mode"); in zl3073x_dpll_input_pin_state_on_dpll_set()
899 "Pin state cannot be changed in current mode"); in zl3073x_dpll_input_pin_state_on_dpll_set()
912 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_prio_get() local
914 *prio = pin->prio; in zl3073x_dpll_input_pin_prio_get()
924 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_prio_set() local
930 /* If the pin is selectable then update HW registers */ in zl3073x_dpll_input_pin_prio_set()
931 if (pin->selectable) { in zl3073x_dpll_input_pin_prio_set()
932 rc = zl3073x_dpll_ref_prio_set(pin, prio); in zl3073x_dpll_input_pin_prio_set()
938 pin->prio = prio; in zl3073x_dpll_input_pin_prio_set()
953 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_esync_get() local
962 out = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_esync_get()
1001 /* Get synth attached to output pin */ in zl3073x_dpll_output_pin_esync_get()
1044 /* Set supported esync ranges if the pin supports esync control and in zl3073x_dpll_output_pin_esync_get()
1047 if (pin->esync_control && (synth_freq / output_div) > 1) { in zl3073x_dpll_output_pin_esync_get()
1068 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_esync_set() local
1073 out = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_esync_set()
1117 /* Get synth attached to output pin */ in zl3073x_dpll_output_pin_esync_set()
1166 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_frequency_get() local
1172 out = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_frequency_get()
1202 * given output pin type. in zl3073x_dpll_output_pin_frequency_get()
1204 if (zl3073x_dpll_is_p_pin(pin)) { in zl3073x_dpll_output_pin_frequency_get()
1205 /* For P-pin the resulting frequency is computed as in zl3073x_dpll_output_pin_frequency_get()
1211 /* For N-pin we have to divide additionally by in zl3073x_dpll_output_pin_frequency_get()
1213 * register that is used as N-pin divisor for these in zl3073x_dpll_output_pin_frequency_get()
1223 /* Check N-pin divisor for zero */ in zl3073x_dpll_output_pin_frequency_get()
1226 "Zero N-pin divisor for output %u got from device\n", in zl3073x_dpll_output_pin_frequency_get()
1231 /* Compute final divisor for N-pin */ in zl3073x_dpll_output_pin_frequency_get()
1255 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_frequency_set() local
1263 out = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_frequency_set()
1312 /* Get N-pin divisor (shares the same register with esync */ in zl3073x_dpll_output_pin_frequency_set()
1317 /* Check N-pin divisor for zero */ in zl3073x_dpll_output_pin_frequency_set()
1320 "Zero N-pin divisor for output %u got from device\n", in zl3073x_dpll_output_pin_frequency_set()
1325 /* Compute current output frequency for P-pin */ in zl3073x_dpll_output_pin_frequency_set()
1328 /* Compute current N-pin frequency */ in zl3073x_dpll_output_pin_frequency_set()
1331 if (zl3073x_dpll_is_p_pin(pin)) { in zl3073x_dpll_output_pin_frequency_set()
1332 /* We are going to change output frequency for P-pin but in zl3073x_dpll_output_pin_frequency_set()
1333 * if the requested frequency is less than current N-pin in zl3073x_dpll_output_pin_frequency_set()
1335 * to compute N-pin divisor to keep its frequency unchanged. in zl3073x_dpll_output_pin_frequency_set()
1350 /* Compute new divisor for N-pin */ in zl3073x_dpll_output_pin_frequency_set()
1353 /* We are going to change frequency of N-pin but if in zl3073x_dpll_output_pin_frequency_set()
1354 * the requested freq is greater or equal than freq of P-pin in zl3073x_dpll_output_pin_frequency_set()
1355 * in the output pair we cannot compute divisor for the N-pin. in zl3073x_dpll_output_pin_frequency_set()
1361 /* Compute new divisor for N-pin */ in zl3073x_dpll_output_pin_frequency_set()
1365 /* Update divisor for the N-pin */ in zl3073x_dpll_output_pin_frequency_set()
1390 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_phase_adjust_get() local
1396 out = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_phase_adjust_get()
1439 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_phase_adjust_set() local
1446 out = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_phase_adjust_set()
1496 /* If the output pin is registered then it is always connected */ in zl3073x_dpll_output_pin_state_on_dpll_get()
1698 * zl3073x_dpll_pin_alloc - allocate DPLL pin
1700 * @dir: pin direction
1701 * @id: pin id
1704 * pin id and direction.
1712 struct zl3073x_dpll_pin *pin; in zl3073x_dpll_pin_alloc() local
1714 pin = kzalloc(sizeof(*pin), GFP_KERNEL); in zl3073x_dpll_pin_alloc()
1715 if (!pin) in zl3073x_dpll_pin_alloc()
1718 pin->dpll = zldpll; in zl3073x_dpll_pin_alloc()
1719 pin->dir = dir; in zl3073x_dpll_pin_alloc()
1720 pin->id = id; in zl3073x_dpll_pin_alloc()
1722 return pin; in zl3073x_dpll_pin_alloc()
1726 * zl3073x_dpll_pin_free - deallocate DPLL pin
1727 * @pin: pin to free
1729 * Deallocates DPLL pin previously allocated by @zl3073x_dpll_pin_alloc.
1732 zl3073x_dpll_pin_free(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_free() argument
1734 WARN(pin->dpll_pin, "DPLL pin is still registered\n"); in zl3073x_dpll_pin_free()
1736 kfree(pin); in zl3073x_dpll_pin_free()
1740 * zl3073x_dpll_pin_register - register DPLL pin
1741 * @pin: pointer to DPLL pin
1742 * @index: absolute pin index for registration
1744 * Registers given DPLL pin into DPLL sub-system.
1749 zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index) in zl3073x_dpll_pin_register() argument
1751 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_register()
1756 /* Get pin properties */ in zl3073x_dpll_pin_register()
1757 props = zl3073x_pin_props_get(zldpll->dev, pin->dir, pin->id); in zl3073x_dpll_pin_register()
1762 strscpy(pin->label, props->package_label); in zl3073x_dpll_pin_register()
1763 pin->esync_control = props->esync_control; in zl3073x_dpll_pin_register()
1765 if (zl3073x_dpll_is_input_pin(pin)) { in zl3073x_dpll_pin_register()
1766 rc = zl3073x_dpll_ref_prio_get(pin, &pin->prio); in zl3073x_dpll_pin_register()
1770 if (pin->prio == ZL_DPLL_REF_PRIO_NONE) { in zl3073x_dpll_pin_register()
1771 /* Clamp prio to max value & mark pin non-selectable */ in zl3073x_dpll_pin_register()
1772 pin->prio = ZL_DPLL_REF_PRIO_MAX; in zl3073x_dpll_pin_register()
1773 pin->selectable = false; in zl3073x_dpll_pin_register()
1775 /* Mark pin as selectable */ in zl3073x_dpll_pin_register()
1776 pin->selectable = true; in zl3073x_dpll_pin_register()
1780 /* Create or get existing DPLL pin */ in zl3073x_dpll_pin_register()
1781 pin->dpll_pin = dpll_pin_get(zldpll->dev->clock_id, index, THIS_MODULE, in zl3073x_dpll_pin_register()
1783 if (IS_ERR(pin->dpll_pin)) { in zl3073x_dpll_pin_register()
1784 rc = PTR_ERR(pin->dpll_pin); in zl3073x_dpll_pin_register()
1788 if (zl3073x_dpll_is_input_pin(pin)) in zl3073x_dpll_pin_register()
1793 /* Register the pin */ in zl3073x_dpll_pin_register()
1794 rc = dpll_pin_register(zldpll->dpll_dev, pin->dpll_pin, ops, pin); in zl3073x_dpll_pin_register()
1798 /* Free pin properties */ in zl3073x_dpll_pin_register()
1804 dpll_pin_put(pin->dpll_pin); in zl3073x_dpll_pin_register()
1806 pin->dpll_pin = NULL; in zl3073x_dpll_pin_register()
1814 * zl3073x_dpll_pin_unregister - unregister DPLL pin
1815 * @pin: pointer to DPLL pin
1817 * Unregisters pin previously registered by @zl3073x_dpll_pin_register.
1820 zl3073x_dpll_pin_unregister(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_unregister() argument
1822 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_unregister()
1825 WARN(!pin->dpll_pin, "DPLL pin is not registered\n"); in zl3073x_dpll_pin_unregister()
1827 if (zl3073x_dpll_is_input_pin(pin)) in zl3073x_dpll_pin_unregister()
1832 /* Unregister the pin */ in zl3073x_dpll_pin_unregister()
1833 dpll_pin_unregister(zldpll->dpll_dev, pin->dpll_pin, ops, pin); in zl3073x_dpll_pin_unregister()
1835 dpll_pin_put(pin->dpll_pin); in zl3073x_dpll_pin_unregister()
1836 pin->dpll_pin = NULL; in zl3073x_dpll_pin_unregister()
1849 struct zl3073x_dpll_pin *pin, *next; in zl3073x_dpll_pins_unregister() local
1851 list_for_each_entry_safe(pin, next, &zldpll->pins, list) { in zl3073x_dpll_pins_unregister()
1852 zl3073x_dpll_pin_unregister(pin); in zl3073x_dpll_pins_unregister()
1853 list_del(&pin->list); in zl3073x_dpll_pins_unregister()
1854 zl3073x_dpll_pin_free(pin); in zl3073x_dpll_pins_unregister()
1859 * zl3073x_dpll_pin_is_registrable - check if the pin is registrable
1861 * @dir: pin direction
1862 * @index: pin index
1864 * Checks if the given pin can be registered to given DPLL. For both
1865 * directions the pin can be registered if it is enabled. In case of
1866 * differential signal type only P-pin is reported as registrable.
1867 * And additionally for the output pin, the pin can be registered only
1870 * Return: true if the pin is registrable, false if not
1885 /* Skip the pin if the DPLL is running in NCO mode */ in zl3073x_dpll_pin_is_registrable()
1897 /* Skip the pin if it is connected to different DPLL channel */ in zl3073x_dpll_pin_is_registrable()
1910 /* Skip N-pin if the corresponding input/output is differential */ in zl3073x_dpll_pin_is_registrable()
1912 dev_dbg(zldev->dev, "%s%u is differential, skipping N-pin\n", in zl3073x_dpll_pin_is_registrable()
1918 /* Skip the pin if it is disabled */ in zl3073x_dpll_pin_is_registrable()
1941 struct zl3073x_dpll_pin *pin; in zl3073x_dpll_pins_register() local
1957 /* Check if the pin registrable to this DPLL */ in zl3073x_dpll_pins_register()
1961 pin = zl3073x_dpll_pin_alloc(zldpll, dir, id); in zl3073x_dpll_pins_register()
1962 if (IS_ERR(pin)) { in zl3073x_dpll_pins_register()
1963 rc = PTR_ERR(pin); in zl3073x_dpll_pins_register()
1967 rc = zl3073x_dpll_pin_register(pin, index); in zl3073x_dpll_pins_register()
1971 list_add(&pin->list, &zldpll->pins); in zl3073x_dpll_pins_register()
2050 * zl3073x_dpll_pin_phase_offset_check - check for pin phase offset change
2051 * @pin: pin to check
2053 * Check for the change of DPLL to connected pin phase offset change.
2058 zl3073x_dpll_pin_phase_offset_check(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_phase_offset_check() argument
2060 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_phase_offset_check()
2067 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_pin_phase_offset_check()
2069 /* Select register to read phase offset value depending on pin and in zl3073x_dpll_pin_phase_offset_check()
2071 * 1) For connected pin use dpll_phase_err_data register in zl3073x_dpll_pin_phase_offset_check()
2074 * report signal errors for given input pin in zl3073x_dpll_pin_phase_offset_check()
2076 if (pin->pin_state == DPLL_PIN_STATE_CONNECTED) { in zl3073x_dpll_pin_phase_offset_check()
2087 pin->label, ERR_PTR(rc)); in zl3073x_dpll_pin_phase_offset_check()
2097 /* The pin is not connected or phase monitor disabled */ in zl3073x_dpll_pin_phase_offset_check()
2114 if (phase_offset != pin->phase_offset) { in zl3073x_dpll_pin_phase_offset_check()
2116 pin->label, pin->phase_offset, phase_offset); in zl3073x_dpll_pin_phase_offset_check()
2117 pin->phase_offset = phase_offset; in zl3073x_dpll_pin_phase_offset_check()
2126 * zl3073x_dpll_pin_ffo_check - check for pin fractional frequency offset change
2127 * @pin: pin to check
2129 * Check for the given pin's fractional frequency change.
2134 zl3073x_dpll_pin_ffo_check(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_ffo_check() argument
2136 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_ffo_check()
2143 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_pin_ffo_check()
2147 pin->label, ERR_PTR(rc)); in zl3073x_dpll_pin_ffo_check()
2160 if (pin->freq_offset != ffo) { in zl3073x_dpll_pin_ffo_check()
2162 pin->label, pin->freq_offset, ffo); in zl3073x_dpll_pin_ffo_check()
2163 pin->freq_offset = ffo; in zl3073x_dpll_pin_ffo_check()
2186 struct zl3073x_dpll_pin *pin; in zl3073x_dpll_changes_check() local
2206 /* Input pin monitoring does make sense only in automatic in zl3073x_dpll_changes_check()
2226 list_for_each_entry(pin, &zldpll->pins, list) { in zl3073x_dpll_changes_check()
2233 if (!zl3073x_dpll_is_input_pin(pin)) in zl3073x_dpll_changes_check()
2236 rc = zl3073x_dpll_ref_state_get(pin, &state); in zl3073x_dpll_changes_check()
2240 pin->label, zldpll->id, ERR_PTR(rc)); in zl3073x_dpll_changes_check()
2244 if (state != pin->pin_state) { in zl3073x_dpll_changes_check()
2245 dev_dbg(dev, "%s state changed: %u->%u\n", pin->label, in zl3073x_dpll_changes_check()
2246 pin->pin_state, state); in zl3073x_dpll_changes_check()
2247 pin->pin_state = state; in zl3073x_dpll_changes_check()
2253 if (zl3073x_dpll_pin_phase_offset_check(pin)) in zl3073x_dpll_changes_check()
2256 if (zl3073x_dpll_pin_ffo_check(pin)) in zl3073x_dpll_changes_check()
2261 dpll_pin_change_ntf(pin->dpll_pin); in zl3073x_dpll_changes_check()