Lines Matching full:pin
28 * struct zl3073x_dpll_pin - DPLL pin
29 * @list: this DPLL pin list entry
30 * @dpll: DPLL the pin is registered to
33 * @dir: pin direction
34 * @id: pin id
35 * @prio: pin priority <0, 14>
36 * @selectable: pin is selectable in automatic mode
39 * @pin_state: last saved pin state
40 * @phase_offset: last saved pin phase offset
67 * zl3073x_dpll_is_input_pin - check if the pin is input one
68 * @pin: pin to check
70 * Return: true if pin is input, false if pin is output.
73 zl3073x_dpll_is_input_pin(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_is_input_pin() argument
75 return pin->dir == DPLL_PIN_DIRECTION_INPUT; in zl3073x_dpll_is_input_pin()
79 * zl3073x_dpll_is_p_pin - check if the pin is P-pin
80 * @pin: pin to check
82 * Return: true if the pin is P-pin, false if it is N-pin
85 zl3073x_dpll_is_p_pin(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_is_p_pin() argument
87 return zl3073x_is_p_pin(pin->id); in zl3073x_dpll_is_p_pin()
96 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_pin_direction_get() local
98 *direction = pin->dir; in zl3073x_dpll_pin_direction_get()
113 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_esync_get() local
117 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_esync_get()
131 /* If the pin supports esync control expose its range but only in zl3073x_dpll_input_pin_esync_get()
134 if (pin->esync_control && zl3073x_ref_freq_get(ref) > 1) { in zl3073x_dpll_input_pin_esync_get()
154 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_esync_set() local
158 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_esync_set()
184 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_ffo_get() local
186 *ffo = pin->freq_offset; in zl3073x_dpll_input_pin_ffo_get()
199 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_frequency_get() local
202 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_frequency_get()
217 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_frequency_set() local
222 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_frequency_set()
393 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_phase_offset_get() local
404 /* Report phase offset only for currently connected pin if the phase in zl3073x_dpll_input_pin_phase_offset_get()
405 * monitor feature is disabled and only if the input pin signal is in zl3073x_dpll_input_pin_phase_offset_get()
408 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_phase_offset_get()
416 ref_phase = pin->phase_offset; in zl3073x_dpll_input_pin_phase_offset_get()
453 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_phase_adjust_get() local
459 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_phase_adjust_get()
483 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_phase_adjust_set() local
488 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_phase_adjust_set()
501 * zl3073x_dpll_ref_prio_get - get priority for given input pin
502 * @pin: pointer to pin
505 * Reads current priority for the given input pin and stores the value
511 zl3073x_dpll_ref_prio_get(struct zl3073x_dpll_pin *pin, u8 *prio) in zl3073x_dpll_ref_prio_get() argument
513 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_ref_prio_get()
526 /* Read reference priority - one value for P&N pins (4 bits/pin) */ in zl3073x_dpll_ref_prio_get()
527 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_ref_prio_get()
533 /* Select nibble according pin type */ in zl3073x_dpll_ref_prio_get()
534 if (zl3073x_dpll_is_p_pin(pin)) in zl3073x_dpll_ref_prio_get()
543 * zl3073x_dpll_ref_prio_set - set priority for given input pin
544 * @pin: pointer to pin
547 * Sets priority for the given input pin.
552 zl3073x_dpll_ref_prio_set(struct zl3073x_dpll_pin *pin, u8 prio) in zl3073x_dpll_ref_prio_set() argument
554 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_ref_prio_set()
568 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_ref_prio_set()
573 /* Update nibble according pin type */ in zl3073x_dpll_ref_prio_set()
574 if (zl3073x_dpll_is_p_pin(pin)) { in zl3073x_dpll_ref_prio_set()
593 * zl3073x_dpll_ref_state_get - get status for given input pin
594 * @pin: pointer to pin
597 * Checks current status for the given input pin and stores the value
603 zl3073x_dpll_ref_state_get(struct zl3073x_dpll_pin *pin, in zl3073x_dpll_ref_state_get() argument
606 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_ref_state_get()
611 ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_ref_state_get()
625 * pin as selectable. in zl3073x_dpll_ref_state_get()
628 zl3073x_dev_ref_is_status_ok(zldev, ref) && pin->selectable) { in zl3073x_dpll_ref_state_get()
633 /* Otherwise report the pin as disconnected */ in zl3073x_dpll_ref_state_get()
647 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_state_on_dpll_get() local
649 return zl3073x_dpll_ref_state_get(pin, state); in zl3073x_dpll_input_pin_state_on_dpll_get()
661 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_state_on_dpll_set() local
670 /* Choose the pin as new selected reference */ in zl3073x_dpll_input_pin_state_on_dpll_set()
671 new_ref = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_input_pin_state_on_dpll_set()
677 "Invalid pin state for manual mode"); in zl3073x_dpll_input_pin_state_on_dpll_set()
686 if (pin->selectable) in zl3073x_dpll_input_pin_state_on_dpll_set()
687 return 0; /* Pin is already selectable */ in zl3073x_dpll_input_pin_state_on_dpll_set()
689 /* Restore pin priority in HW */ in zl3073x_dpll_input_pin_state_on_dpll_set()
690 rc = zl3073x_dpll_ref_prio_set(pin, pin->prio); in zl3073x_dpll_input_pin_state_on_dpll_set()
694 /* Mark pin as selectable */ in zl3073x_dpll_input_pin_state_on_dpll_set()
695 pin->selectable = true; in zl3073x_dpll_input_pin_state_on_dpll_set()
697 if (!pin->selectable) in zl3073x_dpll_input_pin_state_on_dpll_set()
698 return 0; /* Pin is already disconnected */ in zl3073x_dpll_input_pin_state_on_dpll_set()
700 /* Set pin priority to none in HW */ in zl3073x_dpll_input_pin_state_on_dpll_set()
701 rc = zl3073x_dpll_ref_prio_set(pin, in zl3073x_dpll_input_pin_state_on_dpll_set()
706 /* Mark pin as non-selectable */ in zl3073x_dpll_input_pin_state_on_dpll_set()
707 pin->selectable = false; in zl3073x_dpll_input_pin_state_on_dpll_set()
710 "Invalid pin state for automatic mode"); in zl3073x_dpll_input_pin_state_on_dpll_set()
718 "Pin state cannot be changed in current mode"); in zl3073x_dpll_input_pin_state_on_dpll_set()
731 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_prio_get() local
733 *prio = pin->prio; in zl3073x_dpll_input_pin_prio_get()
743 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_input_pin_prio_set() local
749 /* If the pin is selectable then update HW registers */ in zl3073x_dpll_input_pin_prio_set()
750 if (pin->selectable) { in zl3073x_dpll_input_pin_prio_set()
751 rc = zl3073x_dpll_ref_prio_set(pin, prio); in zl3073x_dpll_input_pin_prio_set()
757 pin->prio = prio; in zl3073x_dpll_input_pin_prio_set()
772 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_esync_get() local
778 out_id = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_esync_get()
817 /* Set supported esync ranges if the pin supports esync control and in zl3073x_dpll_output_pin_esync_get()
820 if (pin->esync_control && (synth_freq / out->div) > 1) { in zl3073x_dpll_output_pin_esync_get()
840 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_esync_set() local
846 out_id = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_esync_set()
904 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_frequency_get() local
910 out_id = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_frequency_get()
921 * given output pin type. in zl3073x_dpll_output_pin_frequency_get()
923 * For P-pin the resulting frequency is computed as simple in zl3073x_dpll_output_pin_frequency_get()
926 * For N-pin we have to divide additionally by divisor stored in zl3073x_dpll_output_pin_frequency_get()
928 * N-pin divisor for these modes. in zl3073x_dpll_output_pin_frequency_get()
932 if (!zl3073x_dpll_is_p_pin(pin)) in zl3073x_dpll_output_pin_frequency_get()
956 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_frequency_set() local
962 out_id = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_frequency_set()
988 if (zl3073x_dpll_is_p_pin(pin)) { in zl3073x_dpll_output_pin_frequency_set()
989 /* We are going to change output frequency for P-pin but in zl3073x_dpll_output_pin_frequency_set()
990 * if the requested frequency is less than current N-pin in zl3073x_dpll_output_pin_frequency_set()
992 * to compute N-pin divisor to keep its frequency unchanged. in zl3073x_dpll_output_pin_frequency_set()
994 * Update divisor for N-pin to keep N-pin frequency. in zl3073x_dpll_output_pin_frequency_set()
1006 /* We are going to change frequency of N-pin but if in zl3073x_dpll_output_pin_frequency_set()
1007 * the requested freq is greater or equal than freq of P-pin in zl3073x_dpll_output_pin_frequency_set()
1008 * in the output pair we cannot compute divisor for the N-pin. in zl3073x_dpll_output_pin_frequency_set()
1011 * Update divisor for N-pin in zl3073x_dpll_output_pin_frequency_set()
1035 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_phase_adjust_get() local
1039 out_id = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_phase_adjust_get()
1045 *phase_adjust = -out->phase_comp * pin->phase_gran; in zl3073x_dpll_output_pin_phase_adjust_get()
1060 struct zl3073x_dpll_pin *pin = pin_priv; in zl3073x_dpll_output_pin_phase_adjust_set() local
1064 out_id = zl3073x_output_pin_out_get(pin->id); in zl3073x_dpll_output_pin_phase_adjust_set()
1070 out.phase_comp = -phase_adjust / pin->phase_gran; in zl3073x_dpll_output_pin_phase_adjust_set()
1084 /* If the output pin is registered then it is always connected */ in zl3073x_dpll_output_pin_state_on_dpll_get()
1286 * zl3073x_dpll_pin_alloc - allocate DPLL pin
1288 * @dir: pin direction
1289 * @id: pin id
1292 * pin id and direction.
1300 struct zl3073x_dpll_pin *pin; in zl3073x_dpll_pin_alloc() local
1302 pin = kzalloc(sizeof(*pin), GFP_KERNEL); in zl3073x_dpll_pin_alloc()
1303 if (!pin) in zl3073x_dpll_pin_alloc()
1306 pin->dpll = zldpll; in zl3073x_dpll_pin_alloc()
1307 pin->dir = dir; in zl3073x_dpll_pin_alloc()
1308 pin->id = id; in zl3073x_dpll_pin_alloc()
1310 return pin; in zl3073x_dpll_pin_alloc()
1314 * zl3073x_dpll_pin_free - deallocate DPLL pin
1315 * @pin: pin to free
1317 * Deallocates DPLL pin previously allocated by @zl3073x_dpll_pin_alloc.
1320 zl3073x_dpll_pin_free(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_free() argument
1322 WARN(pin->dpll_pin, "DPLL pin is still registered\n"); in zl3073x_dpll_pin_free()
1324 kfree(pin); in zl3073x_dpll_pin_free()
1328 * zl3073x_dpll_pin_register - register DPLL pin
1329 * @pin: pointer to DPLL pin
1330 * @index: absolute pin index for registration
1332 * Registers given DPLL pin into DPLL sub-system.
1337 zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index) in zl3073x_dpll_pin_register() argument
1339 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_register()
1344 /* Get pin properties */ in zl3073x_dpll_pin_register()
1345 props = zl3073x_pin_props_get(zldpll->dev, pin->dir, pin->id); in zl3073x_dpll_pin_register()
1350 strscpy(pin->label, props->package_label); in zl3073x_dpll_pin_register()
1351 pin->esync_control = props->esync_control; in zl3073x_dpll_pin_register()
1352 pin->phase_gran = props->dpll_props.phase_gran; in zl3073x_dpll_pin_register()
1354 if (zl3073x_dpll_is_input_pin(pin)) { in zl3073x_dpll_pin_register()
1355 rc = zl3073x_dpll_ref_prio_get(pin, &pin->prio); in zl3073x_dpll_pin_register()
1359 if (pin->prio == ZL_DPLL_REF_PRIO_NONE) { in zl3073x_dpll_pin_register()
1360 /* Clamp prio to max value & mark pin non-selectable */ in zl3073x_dpll_pin_register()
1361 pin->prio = ZL_DPLL_REF_PRIO_MAX; in zl3073x_dpll_pin_register()
1362 pin->selectable = false; in zl3073x_dpll_pin_register()
1364 /* Mark pin as selectable */ in zl3073x_dpll_pin_register()
1365 pin->selectable = true; in zl3073x_dpll_pin_register()
1369 /* Create or get existing DPLL pin */ in zl3073x_dpll_pin_register()
1370 pin->dpll_pin = dpll_pin_get(zldpll->dev->clock_id, index, THIS_MODULE, in zl3073x_dpll_pin_register()
1372 if (IS_ERR(pin->dpll_pin)) { in zl3073x_dpll_pin_register()
1373 rc = PTR_ERR(pin->dpll_pin); in zl3073x_dpll_pin_register()
1377 if (zl3073x_dpll_is_input_pin(pin)) in zl3073x_dpll_pin_register()
1382 /* Register the pin */ in zl3073x_dpll_pin_register()
1383 rc = dpll_pin_register(zldpll->dpll_dev, pin->dpll_pin, ops, pin); in zl3073x_dpll_pin_register()
1387 /* Free pin properties */ in zl3073x_dpll_pin_register()
1393 dpll_pin_put(pin->dpll_pin); in zl3073x_dpll_pin_register()
1395 pin->dpll_pin = NULL; in zl3073x_dpll_pin_register()
1403 * zl3073x_dpll_pin_unregister - unregister DPLL pin
1404 * @pin: pointer to DPLL pin
1406 * Unregisters pin previously registered by @zl3073x_dpll_pin_register.
1409 zl3073x_dpll_pin_unregister(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_unregister() argument
1411 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_unregister()
1414 WARN(!pin->dpll_pin, "DPLL pin is not registered\n"); in zl3073x_dpll_pin_unregister()
1416 if (zl3073x_dpll_is_input_pin(pin)) in zl3073x_dpll_pin_unregister()
1421 /* Unregister the pin */ in zl3073x_dpll_pin_unregister()
1422 dpll_pin_unregister(zldpll->dpll_dev, pin->dpll_pin, ops, pin); in zl3073x_dpll_pin_unregister()
1424 dpll_pin_put(pin->dpll_pin); in zl3073x_dpll_pin_unregister()
1425 pin->dpll_pin = NULL; in zl3073x_dpll_pin_unregister()
1438 struct zl3073x_dpll_pin *pin, *next; in zl3073x_dpll_pins_unregister() local
1440 list_for_each_entry_safe(pin, next, &zldpll->pins, list) { in zl3073x_dpll_pins_unregister()
1441 zl3073x_dpll_pin_unregister(pin); in zl3073x_dpll_pins_unregister()
1442 list_del(&pin->list); in zl3073x_dpll_pins_unregister()
1443 zl3073x_dpll_pin_free(pin); in zl3073x_dpll_pins_unregister()
1448 * zl3073x_dpll_pin_is_registrable - check if the pin is registrable
1450 * @dir: pin direction
1451 * @index: pin index
1453 * Checks if the given pin can be registered to given DPLL. For both
1454 * directions the pin can be registered if it is enabled. In case of
1455 * differential signal type only P-pin is reported as registrable.
1456 * And additionally for the output pin, the pin can be registered only
1459 * Return: true if the pin is registrable, false if not
1473 /* Skip the pin if the DPLL is running in NCO mode */ in zl3073x_dpll_pin_is_registrable()
1485 /* Skip the pin if it is connected to different DPLL channel */ in zl3073x_dpll_pin_is_registrable()
1498 /* Skip N-pin if the corresponding input/output is differential */ in zl3073x_dpll_pin_is_registrable()
1500 dev_dbg(zldev->dev, "%s%u is differential, skipping N-pin\n", in zl3073x_dpll_pin_is_registrable()
1506 /* Skip the pin if it is disabled */ in zl3073x_dpll_pin_is_registrable()
1529 struct zl3073x_dpll_pin *pin; in zl3073x_dpll_pins_register() local
1545 /* Check if the pin registrable to this DPLL */ in zl3073x_dpll_pins_register()
1549 pin = zl3073x_dpll_pin_alloc(zldpll, dir, id); in zl3073x_dpll_pins_register()
1550 if (IS_ERR(pin)) { in zl3073x_dpll_pins_register()
1551 rc = PTR_ERR(pin); in zl3073x_dpll_pins_register()
1555 rc = zl3073x_dpll_pin_register(pin, index); in zl3073x_dpll_pins_register()
1559 list_add(&pin->list, &zldpll->pins); in zl3073x_dpll_pins_register()
1638 * zl3073x_dpll_pin_phase_offset_check - check for pin phase offset change
1639 * @pin: pin to check
1641 * Check for the change of DPLL to connected pin phase offset change.
1646 zl3073x_dpll_pin_phase_offset_check(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_phase_offset_check() argument
1648 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_phase_offset_check()
1656 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_pin_phase_offset_check()
1660 /* Select register to read phase offset value depending on pin and in zl3073x_dpll_pin_phase_offset_check()
1662 * 1) For connected pin use dpll_phase_err_data register in zl3073x_dpll_pin_phase_offset_check()
1666 if (pin->pin_state == DPLL_PIN_STATE_CONNECTED) in zl3073x_dpll_pin_phase_offset_check()
1686 if (phase_offset != pin->phase_offset) { in zl3073x_dpll_pin_phase_offset_check()
1688 pin->label, pin->phase_offset, phase_offset); in zl3073x_dpll_pin_phase_offset_check()
1689 pin->phase_offset = phase_offset; in zl3073x_dpll_pin_phase_offset_check()
1698 * zl3073x_dpll_pin_ffo_check - check for pin fractional frequency offset change
1699 * @pin: pin to check
1701 * Check for the given pin's fractional frequency change.
1706 zl3073x_dpll_pin_ffo_check(struct zl3073x_dpll_pin *pin) in zl3073x_dpll_pin_ffo_check() argument
1708 struct zl3073x_dpll *zldpll = pin->dpll; in zl3073x_dpll_pin_ffo_check()
1714 ref_id = zl3073x_input_pin_ref_get(pin->id); in zl3073x_dpll_pin_ffo_check()
1722 if (pin->freq_offset != ref->ffo) { in zl3073x_dpll_pin_ffo_check()
1724 pin->label, pin->freq_offset, ref->ffo); in zl3073x_dpll_pin_ffo_check()
1725 pin->freq_offset = ref->ffo; in zl3073x_dpll_pin_ffo_check()
1748 struct zl3073x_dpll_pin *pin; in zl3073x_dpll_changes_check() local
1768 /* Input pin monitoring does make sense only in automatic in zl3073x_dpll_changes_check()
1788 list_for_each_entry(pin, &zldpll->pins, list) { in zl3073x_dpll_changes_check()
1795 if (!zl3073x_dpll_is_input_pin(pin)) in zl3073x_dpll_changes_check()
1798 rc = zl3073x_dpll_ref_state_get(pin, &state); in zl3073x_dpll_changes_check()
1802 pin->label, zldpll->id, ERR_PTR(rc)); in zl3073x_dpll_changes_check()
1806 if (state != pin->pin_state) { in zl3073x_dpll_changes_check()
1807 dev_dbg(dev, "%s state changed: %u->%u\n", pin->label, in zl3073x_dpll_changes_check()
1808 pin->pin_state, state); in zl3073x_dpll_changes_check()
1809 pin->pin_state = state; in zl3073x_dpll_changes_check()
1815 if (zl3073x_dpll_pin_phase_offset_check(pin)) in zl3073x_dpll_changes_check()
1818 if (zl3073x_dpll_pin_ffo_check(pin)) in zl3073x_dpll_changes_check()
1823 dpll_pin_change_ntf(pin->dpll_pin); in zl3073x_dpll_changes_check()