92 			       struct netlink_ext_ack *extack)  in zl3073x_dpll_pin_direction_get()
161 				 struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_esync_get()
226 				 struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_esync_set()
278 			       s64 *ffo, struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_ffo_get()
292 				     struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_frequency_get()
314 				     struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_frequency_set()
520 					struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_phase_offset_get()
597 					struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_phase_adjust_get()
637 					struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_phase_adjust_set()
826 					 struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_state_on_dpll_get()
839 					 struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_state_on_dpll_set()
910 				u32 *prio, struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_prio_get()
922 				u32 prio, struct netlink_ext_ack *extack)  in zl3073x_dpll_input_pin_prio_set()
949 				  struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_esync_get()
1063 				  struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_esync_set()
1162 				      struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_frequency_get()
1251 				      struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_frequency_set()
1386 					 struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_phase_adjust_get()
1435 					 struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_phase_adjust_set()
1494 					  struct netlink_ext_ack *extack)  in zl3073x_dpll_output_pin_state_on_dpll_get()
1506 			     struct netlink_ext_ack *extack)  in zl3073x_dpll_lock_status_get()
1554 		      enum dpll_mode *mode, struct netlink_ext_ack *extack)  in zl3073x_dpll_mode_get()
1583 				      struct netlink_ext_ack *extack)  in zl3073x_dpll_phase_offset_monitor_get()
1599 				      struct netlink_ext_ack *extack)  in zl3073x_dpll_phase_offset_monitor_set()