Lines Matching refs:tdma
106 void (*set_global_pg_config)(struct tegra_adma *tdma);
139 struct tegra_adma *tdma; member
179 static inline void tdma_write(struct tegra_adma *tdma, u32 reg, u32 val) in tdma_write() argument
181 writel(val, tdma->base_addr + tdma->cdata->global_reg_offset + reg); in tdma_write()
184 static inline u32 tdma_read(struct tegra_adma *tdma, u32 reg) in tdma_read() argument
186 return readl(tdma->base_addr + tdma->cdata->global_reg_offset + reg); in tdma_read()
189 static inline void tdma_ch_global_write(struct tegra_adma *tdma, u32 reg, u32 val) in tdma_ch_global_write() argument
191 writel(val, tdma->ch_base_addr + tdma->cdata->global_reg_offset + reg); in tdma_ch_global_write()
217 return tdc->tdma->dev; in tdc2dev()
235 static void tegra186_adma_global_page_config(struct tegra_adma *tdma) in tegra186_adma_global_page_config() argument
241 tdma_write(tdma, TEGRA186_ADMA_GLOBAL_PAGE_CHGRP, 0); in tegra186_adma_global_page_config()
242 tdma_write(tdma, TEGRA186_ADMA_GLOBAL_PAGE_RX_REQ, 0); in tegra186_adma_global_page_config()
243 tdma_write(tdma, TEGRA186_ADMA_GLOBAL_PAGE_TX_REQ, 0); in tegra186_adma_global_page_config()
244 tdma_write(tdma, TEGRA186_ADMA_GLOBAL_PAGE_CHGRP + (tdma->ch_page_no * 0x4), 0xff); in tegra186_adma_global_page_config()
245 tdma_write(tdma, TEGRA186_ADMA_GLOBAL_PAGE_RX_REQ + (tdma->ch_page_no * 0x4), 0x1ffffff); in tegra186_adma_global_page_config()
246 tdma_write(tdma, TEGRA186_ADMA_GLOBAL_PAGE_TX_REQ + (tdma->ch_page_no * 0x4), 0xffffff); in tegra186_adma_global_page_config()
249 static int tegra_adma_init(struct tegra_adma *tdma) in tegra_adma_init() argument
255 tdma_ch_global_write(tdma, tdma->cdata->global_int_clear, 0x1); in tegra_adma_init()
257 if (!tdma->base_addr) in tegra_adma_init()
261 tdma_write(tdma, ADMA_GLOBAL_SOFT_RESET, 0x1); in tegra_adma_init()
265 tdma->base_addr + in tegra_adma_init()
266 tdma->cdata->global_reg_offset + in tegra_adma_init()
272 if (tdma->cdata->set_global_pg_config) in tegra_adma_init()
273 tdma->cdata->set_global_pg_config(tdma); in tegra_adma_init()
276 tdma_write(tdma, ADMA_GLOBAL_CMD, 1); in tegra_adma_init()
284 struct tegra_adma *tdma = tdc->tdma; in tegra_adma_request_alloc() local
290 if (sreq_index > tdma->cdata->ch_req_max) { in tegra_adma_request_alloc()
291 dev_err(tdma->dev, "invalid DMA request\n"); in tegra_adma_request_alloc()
297 if (test_and_set_bit(sreq_index, &tdma->tx_requests_reserved)) { in tegra_adma_request_alloc()
298 dev_err(tdma->dev, "DMA request reserved\n"); in tegra_adma_request_alloc()
304 if (test_and_set_bit(sreq_index, &tdma->rx_requests_reserved)) { in tegra_adma_request_alloc()
305 dev_err(tdma->dev, "DMA request reserved\n"); in tegra_adma_request_alloc()
311 dev_WARN(tdma->dev, "channel %s has invalid transfer type\n", in tegra_adma_request_alloc()
324 struct tegra_adma *tdma = tdc->tdma; in tegra_adma_request_free() local
331 clear_bit(tdc->sreq_index, &tdma->tx_requests_reserved); in tegra_adma_request_free()
335 clear_bit(tdc->sreq_index, &tdma->rx_requests_reserved); in tegra_adma_request_free()
339 dev_WARN(tdma->dev, "channel %s has invalid transfer type\n", in tegra_adma_request_free()
596 const struct tegra_adma_chip_data *cdata = tdc->tdma->cdata; in tegra_adma_set_xfer_params()
742 struct tegra_adma *tdma = ofdma->of_dma_data; in tegra_dma_of_xlate() local
753 dev_err(tdma->dev, "DMA request must not be 0\n"); in tegra_dma_of_xlate()
757 chan = dma_get_any_slave_channel(&tdma->dma_dev); in tegra_dma_of_xlate()
769 struct tegra_adma *tdma = dev_get_drvdata(dev); in tegra_adma_runtime_suspend() local
774 if (tdma->base_addr) in tegra_adma_runtime_suspend()
775 tdma->global_cmd = tdma_read(tdma, ADMA_GLOBAL_CMD); in tegra_adma_runtime_suspend()
777 if (!tdma->global_cmd) in tegra_adma_runtime_suspend()
780 for (i = 0; i < tdma->nr_channels; i++) { in tegra_adma_runtime_suspend()
781 tdc = &tdma->channels[i]; in tegra_adma_runtime_suspend()
783 if (!tdc->tdma) in tegra_adma_runtime_suspend()
800 clk_disable_unprepare(tdma->ahub_clk); in tegra_adma_runtime_suspend()
807 struct tegra_adma *tdma = dev_get_drvdata(dev); in tegra_adma_runtime_resume() local
812 ret = clk_prepare_enable(tdma->ahub_clk); in tegra_adma_runtime_resume()
817 if (tdma->base_addr) { in tegra_adma_runtime_resume()
818 tdma_write(tdma, ADMA_GLOBAL_CMD, tdma->global_cmd); in tegra_adma_runtime_resume()
819 if (tdma->cdata->set_global_pg_config) in tegra_adma_runtime_resume()
820 tdma->cdata->set_global_pg_config(tdma); in tegra_adma_runtime_resume()
823 if (!tdma->global_cmd) in tegra_adma_runtime_resume()
826 for (i = 0; i < tdma->nr_channels; i++) { in tegra_adma_runtime_resume()
827 tdc = &tdma->channels[i]; in tegra_adma_runtime_resume()
829 if (!tdc->tdma) in tegra_adma_runtime_resume()
893 struct tegra_adma *tdma; in tegra_adma_probe() local
903 tdma = devm_kzalloc(&pdev->dev, in tegra_adma_probe()
904 struct_size(tdma, channels, cdata->nr_channels), in tegra_adma_probe()
906 if (!tdma) in tegra_adma_probe()
909 tdma->dev = &pdev->dev; in tegra_adma_probe()
910 tdma->cdata = cdata; in tegra_adma_probe()
911 tdma->nr_channels = cdata->nr_channels; in tegra_adma_probe()
912 platform_set_drvdata(pdev, tdma); in tegra_adma_probe()
916 tdma->ch_base_addr = devm_ioremap_resource(&pdev->dev, res_page); in tegra_adma_probe()
917 if (IS_ERR(tdma->ch_base_addr)) in tegra_adma_probe()
918 return PTR_ERR(tdma->ch_base_addr); in tegra_adma_probe()
936 tdma->ch_page_no = page_no - 1; in tegra_adma_probe()
937 tdma->base_addr = devm_ioremap_resource(&pdev->dev, res_base); in tegra_adma_probe()
938 if (IS_ERR(tdma->base_addr)) in tegra_adma_probe()
939 return PTR_ERR(tdma->base_addr); in tegra_adma_probe()
945 tdma->base_addr = devm_ioremap_resource(&pdev->dev, res_base); in tegra_adma_probe()
946 if (IS_ERR(tdma->base_addr)) in tegra_adma_probe()
947 return PTR_ERR(tdma->base_addr); in tegra_adma_probe()
952 tdma->ch_base_addr = tdma->base_addr + cdata->ch_base_offset; in tegra_adma_probe()
955 tdma->ahub_clk = devm_clk_get(&pdev->dev, "d_audio"); in tegra_adma_probe()
956 if (IS_ERR(tdma->ahub_clk)) { in tegra_adma_probe()
958 return PTR_ERR(tdma->ahub_clk); in tegra_adma_probe()
961 tdma->dma_chan_mask = devm_kzalloc(&pdev->dev, in tegra_adma_probe()
962 BITS_TO_LONGS(tdma->nr_channels) * sizeof(unsigned long), in tegra_adma_probe()
964 if (!tdma->dma_chan_mask) in tegra_adma_probe()
968 bitmap_fill(tdma->dma_chan_mask, tdma->nr_channels); in tegra_adma_probe()
971 (u32 *)tdma->dma_chan_mask, in tegra_adma_probe()
972 BITS_TO_U32(tdma->nr_channels)); in tegra_adma_probe()
978 INIT_LIST_HEAD(&tdma->dma_dev.channels); in tegra_adma_probe()
979 for (i = 0; i < tdma->nr_channels; i++) { in tegra_adma_probe()
980 struct tegra_adma_chan *tdc = &tdma->channels[i]; in tegra_adma_probe()
983 if (!test_bit(i, tdma->dma_chan_mask)) in tegra_adma_probe()
986 tdc->chan_addr = tdma->ch_base_addr + (cdata->ch_reg_size * i); in tegra_adma_probe()
994 vchan_init(&tdc->vc, &tdma->dma_dev); in tegra_adma_probe()
996 tdc->tdma = tdma; in tegra_adma_probe()
1005 ret = tegra_adma_init(tdma); in tegra_adma_probe()
1009 dma_cap_set(DMA_SLAVE, tdma->dma_dev.cap_mask); in tegra_adma_probe()
1010 dma_cap_set(DMA_PRIVATE, tdma->dma_dev.cap_mask); in tegra_adma_probe()
1011 dma_cap_set(DMA_CYCLIC, tdma->dma_dev.cap_mask); in tegra_adma_probe()
1013 tdma->dma_dev.dev = &pdev->dev; in tegra_adma_probe()
1014 tdma->dma_dev.device_alloc_chan_resources = in tegra_adma_probe()
1016 tdma->dma_dev.device_free_chan_resources = in tegra_adma_probe()
1018 tdma->dma_dev.device_issue_pending = tegra_adma_issue_pending; in tegra_adma_probe()
1019 tdma->dma_dev.device_prep_dma_cyclic = tegra_adma_prep_dma_cyclic; in tegra_adma_probe()
1020 tdma->dma_dev.device_config = tegra_adma_slave_config; in tegra_adma_probe()
1021 tdma->dma_dev.device_tx_status = tegra_adma_tx_status; in tegra_adma_probe()
1022 tdma->dma_dev.device_terminate_all = tegra_adma_terminate_all; in tegra_adma_probe()
1023 tdma->dma_dev.src_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); in tegra_adma_probe()
1024 tdma->dma_dev.dst_addr_widths = BIT(DMA_SLAVE_BUSWIDTH_4_BYTES); in tegra_adma_probe()
1025 tdma->dma_dev.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV); in tegra_adma_probe()
1026 tdma->dma_dev.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; in tegra_adma_probe()
1027 tdma->dma_dev.device_pause = tegra_adma_pause; in tegra_adma_probe()
1028 tdma->dma_dev.device_resume = tegra_adma_resume; in tegra_adma_probe()
1030 ret = dma_async_device_register(&tdma->dma_dev); in tegra_adma_probe()
1037 tegra_dma_of_xlate, tdma); in tegra_adma_probe()
1046 tdma->nr_channels); in tegra_adma_probe()
1051 dma_async_device_unregister(&tdma->dma_dev); in tegra_adma_probe()
1058 irq_dispose_mapping(tdma->channels[i].irq); in tegra_adma_probe()
1065 struct tegra_adma *tdma = platform_get_drvdata(pdev); in tegra_adma_remove() local
1069 dma_async_device_unregister(&tdma->dma_dev); in tegra_adma_remove()
1071 for (i = 0; i < tdma->nr_channels; ++i) { in tegra_adma_remove()
1072 if (tdma->channels[i].irq) in tegra_adma_remove()
1073 irq_dispose_mapping(tdma->channels[i].irq); in tegra_adma_remove()