24 /* CSR register */
189 	u32 csr;  member
291 	dev_dbg(tdc2dev(tdc), "CSR %x STA %x CSRE %x SRC %x DST %x\n",  in tegra_dma_dump_chan_regs()
457 	u32 csr, status;  in tegra_dma_disable()  local
459 	csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR);  in tegra_dma_disable()
462 	csr &= ~TEGRA_GPCDMA_CSR_IE_EOC;  in tegra_dma_disable()
465 	csr &= ~TEGRA_GPCDMA_CSR_ENB;  in tegra_dma_disable()
466 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr);  in tegra_dma_disable()
507 		  ch_regs->csr | TEGRA_GPCDMA_CSR_ENB);  in tegra_dma_configure_next_sg()
539 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, ch_regs->csr);  in tegra_dma_start()
543 		  ch_regs->csr | TEGRA_GPCDMA_CSR_ENB);  in tegra_dma_start()
669 	u32 status, csr;  in tegra_dma_stop_client()  local
676 	csr = tdc_read(tdc, TEGRA_GPCDMA_CHAN_CSR);  in tegra_dma_stop_client()
677 	csr &= ~(TEGRA_GPCDMA_CSR_REQ_SEL_MASK);  in tegra_dma_stop_client()
678 	csr |= TEGRA_GPCDMA_CSR_REQ_SEL_UNUSED;  in tegra_dma_stop_client()
679 	tdc_write(tdc, TEGRA_GPCDMA_CHAN_CSR, csr);  in tegra_dma_stop_client()
842 			      u32 *csr,  in get_transfer_param()  argument
852 		*csr = TEGRA_GPCDMA_CSR_DMA_MEM2IO_FC;  in get_transfer_param()
859 		*csr = TEGRA_GPCDMA_CSR_DMA_IO2MEM_FC;  in get_transfer_param()
876 	u32 csr, mc_seq;  in tegra_dma_prep_dma_memset()  local
885 	csr = TEGRA_GPCDMA_CSR_DMA_FIXED_PAT;  in tegra_dma_prep_dma_memset()
887 	csr |= TEGRA_GPCDMA_CSR_ONCE;  in tegra_dma_prep_dma_memset()
889 	csr |= TEGRA_GPCDMA_CSR_IRQ_MASK;  in tegra_dma_prep_dma_memset()
892 		csr |= TEGRA_GPCDMA_CSR_IE_EOC;  in tegra_dma_prep_dma_memset()
894 	csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);  in tegra_dma_prep_dma_memset()
926 	sg_req[0].ch_regs.csr = csr;  in tegra_dma_prep_dma_memset()
943 	u32 csr, mc_seq;  in tegra_dma_prep_dma_memcpy()  local
953 	csr = TEGRA_GPCDMA_CSR_DMA_MEM2MEM;  in tegra_dma_prep_dma_memcpy()
955 	csr |= TEGRA_GPCDMA_CSR_ONCE;  in tegra_dma_prep_dma_memcpy()
957 	csr |= TEGRA_GPCDMA_CSR_IRQ_MASK;  in tegra_dma_prep_dma_memcpy()
960 		csr |= TEGRA_GPCDMA_CSR_IE_EOC;  in tegra_dma_prep_dma_memcpy()
962 	csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);  in tegra_dma_prep_dma_memcpy()
996 	sg_req[0].ch_regs.csr = csr;  in tegra_dma_prep_dma_memcpy()
1013 	u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0;  in tegra_dma_prep_slave_sg()  local
1034 	ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr,  in tegra_dma_prep_slave_sg()
1040 	csr |= TEGRA_GPCDMA_CSR_ONCE;  in tegra_dma_prep_slave_sg()
1042 	csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id);  in tegra_dma_prep_slave_sg()
1044 	csr |= TEGRA_GPCDMA_CSR_IRQ_MASK;  in tegra_dma_prep_slave_sg()
1046 	csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);  in tegra_dma_prep_slave_sg()
1050 		csr |= TEGRA_GPCDMA_CSR_IE_EOC;  in tegra_dma_prep_slave_sg()
1115 		sg_req[i].ch_regs.csr = csr;  in tegra_dma_prep_slave_sg()
1131 	u32 csr, mc_seq, apb_ptr = 0, mmio_seq = 0, burst_size;  in tegra_dma_prep_dma_cyclic()  local
1169 	ret = get_transfer_param(tdc, direction, &apb_ptr, &mmio_seq, &csr,  in tegra_dma_prep_dma_cyclic()
1175 	csr &= ~TEGRA_GPCDMA_CSR_ONCE;  in tegra_dma_prep_dma_cyclic()
1177 	csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_REQ_SEL_MASK, tdc->slave_id);  in tegra_dma_prep_dma_cyclic()
1179 	csr |= TEGRA_GPCDMA_CSR_IRQ_MASK;  in tegra_dma_prep_dma_cyclic()
1181 	csr |= FIELD_PREP(TEGRA_GPCDMA_CSR_WEIGHT, 1);  in tegra_dma_prep_dma_cyclic()
1185 		csr |= TEGRA_GPCDMA_CSR_IE_EOC;  in tegra_dma_prep_dma_cyclic()
1236 		sg_req[i].ch_regs.csr = csr;  in tegra_dma_prep_dma_cyclic()