Lines Matching refs:dmadev
289 static u32 stm32_mdma_read(struct stm32_mdma_device *dmadev, u32 reg) in stm32_mdma_read() argument
291 return readl_relaxed(dmadev->base + reg); in stm32_mdma_read()
294 static void stm32_mdma_write(struct stm32_mdma_device *dmadev, u32 reg, u32 val) in stm32_mdma_write() argument
296 writel_relaxed(val, dmadev->base + reg); in stm32_mdma_write()
299 static void stm32_mdma_set_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_set_bits() argument
302 void __iomem *addr = dmadev->base + reg; in stm32_mdma_set_bits()
307 static void stm32_mdma_clr_bits(struct stm32_mdma_device *dmadev, u32 reg, in stm32_mdma_clr_bits() argument
310 void __iomem *addr = dmadev->base + reg; in stm32_mdma_clr_bits()
406 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_disable_chan() local
414 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_IRQ_MASK); in stm32_mdma_disable_chan()
416 ccr = stm32_mdma_read(dmadev, reg); in stm32_mdma_disable_chan()
418 stm32_mdma_clr_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_disable_chan()
422 dmadev->base + STM32_MDMA_CISR(id), cisr, in stm32_mdma_disable_chan()
435 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_stop() local
445 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_stop()
449 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_stop()
455 static void stm32_mdma_set_bus(struct stm32_mdma_device *dmadev, u32 *ctbr, in stm32_mdma_set_bus() argument
464 for (i = 0; i < dmadev->nr_ahb_addr_masks; i++) { in stm32_mdma_set_bus()
465 if (mask == dmadev->ahb_addr_masks[i]) { in stm32_mdma_set_bus()
478 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_set_xfer_param() local
491 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)) & ~STM32_MDMA_CCR_EN; in stm32_mdma_set_xfer_param()
492 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_set_xfer_param()
493 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_set_xfer_param()
592 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_set_xfer_param()
599 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(chan->id), dst_addr); in stm32_mdma_set_xfer_param()
650 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_set_xfer_param()
657 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(chan->id), src_addr); in stm32_mdma_set_xfer_param()
729 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_setup_xfer() local
754 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_setup_xfer()
764 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_setup_xfer()
847 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_cyclic() local
887 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, in stm32_mdma_prep_dma_cyclic()
893 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, in stm32_mdma_prep_dma_cyclic()
941 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_prep_dma_memcpy() local
967 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)) & ~STM32_MDMA_CCR_EN; in stm32_mdma_prep_dma_memcpy()
968 ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id)); in stm32_mdma_prep_dma_memcpy()
969 ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id)); in stm32_mdma_prep_dma_memcpy()
970 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_prep_dma_memcpy()
993 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_SBUS, src); in stm32_mdma_prep_dma_memcpy()
994 stm32_mdma_set_bus(dmadev, &ctbr, STM32_MDMA_CTBR_DBUS, dest); in stm32_mdma_prep_dma_memcpy()
1117 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_dump_reg() local
1120 stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id))); in stm32_mdma_dump_reg()
1122 stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id))); in stm32_mdma_dump_reg()
1124 stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id))); in stm32_mdma_dump_reg()
1126 stm32_mdma_read(dmadev, STM32_MDMA_CSAR(chan->id))); in stm32_mdma_dump_reg()
1128 stm32_mdma_read(dmadev, STM32_MDMA_CDAR(chan->id))); in stm32_mdma_dump_reg()
1130 stm32_mdma_read(dmadev, STM32_MDMA_CBRUR(chan->id))); in stm32_mdma_dump_reg()
1132 stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id))); in stm32_mdma_dump_reg()
1134 stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id))); in stm32_mdma_dump_reg()
1136 stm32_mdma_read(dmadev, STM32_MDMA_CMAR(chan->id))); in stm32_mdma_dump_reg()
1138 stm32_mdma_read(dmadev, STM32_MDMA_CMDR(chan->id))); in stm32_mdma_dump_reg()
1143 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_start_transfer() local
1161 stm32_mdma_write(dmadev, STM32_MDMA_CCR(id), chan->desc->ccr); in stm32_mdma_start_transfer()
1162 stm32_mdma_write(dmadev, STM32_MDMA_CTCR(id), hwdesc->ctcr); in stm32_mdma_start_transfer()
1163 stm32_mdma_write(dmadev, STM32_MDMA_CBNDTR(id), hwdesc->cbndtr); in stm32_mdma_start_transfer()
1164 stm32_mdma_write(dmadev, STM32_MDMA_CSAR(id), hwdesc->csar); in stm32_mdma_start_transfer()
1165 stm32_mdma_write(dmadev, STM32_MDMA_CDAR(id), hwdesc->cdar); in stm32_mdma_start_transfer()
1166 stm32_mdma_write(dmadev, STM32_MDMA_CBRUR(id), hwdesc->cbrur); in stm32_mdma_start_transfer()
1167 stm32_mdma_write(dmadev, STM32_MDMA_CLAR(id), hwdesc->clar); in stm32_mdma_start_transfer()
1168 stm32_mdma_write(dmadev, STM32_MDMA_CTBR(id), hwdesc->ctbr); in stm32_mdma_start_transfer()
1169 stm32_mdma_write(dmadev, STM32_MDMA_CMAR(id), hwdesc->cmar); in stm32_mdma_start_transfer()
1170 stm32_mdma_write(dmadev, STM32_MDMA_CMDR(id), hwdesc->cmdr); in stm32_mdma_start_transfer()
1173 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id)); in stm32_mdma_start_transfer()
1175 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(id), status); in stm32_mdma_start_transfer()
1180 stm32_mdma_set_bits(dmadev, STM32_MDMA_CCR(id), STM32_MDMA_CCR_EN); in stm32_mdma_start_transfer()
1185 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_start_transfer()
1231 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_resume() local
1237 if (!chan->desc || (stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)) & STM32_MDMA_CCR_EN)) in stm32_mdma_resume()
1245 stm32_mdma_write(dmadev, STM32_MDMA_CCR(chan->id), chan->desc->ccr); in stm32_mdma_resume()
1248 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_resume()
1250 stm32_mdma_set_bits(dmadev, STM32_MDMA_CIFCR(chan->id), status); in stm32_mdma_resume()
1256 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_EN); in stm32_mdma_resume()
1260 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CCR_SWRQ); in stm32_mdma_resume()
1323 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_desc_residue() local
1328 cisr = stm32_mdma_read(dmadev, STM32_MDMA_CISR(chan->id)); in stm32_mdma_desc_residue()
1332 clar = stm32_mdma_read(dmadev, STM32_MDMA_CLAR(chan->id)); in stm32_mdma_desc_residue()
1342 cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id)); in stm32_mdma_desc_residue()
1401 struct stm32_mdma_device *dmadev = devid; in stm32_mdma_irq_handler() local
1406 status = readl_relaxed(dmadev->base + STM32_MDMA_GISR0); in stm32_mdma_irq_handler()
1408 dev_dbg(mdma2dev(dmadev), "spurious it\n"); in stm32_mdma_irq_handler()
1412 chan = &dmadev->chan[id]; in stm32_mdma_irq_handler()
1416 status = stm32_mdma_read(dmadev, STM32_MDMA_CISR(id)); in stm32_mdma_irq_handler()
1419 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(id)); in stm32_mdma_irq_handler()
1437 readl_relaxed(dmadev->base + STM32_MDMA_CESR(id))); in stm32_mdma_irq_handler()
1438 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CTEIF); in stm32_mdma_irq_handler()
1443 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CCTCIF); in stm32_mdma_irq_handler()
1449 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBRTIF); in stm32_mdma_irq_handler()
1454 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CBTIF); in stm32_mdma_irq_handler()
1465 stm32_mdma_set_bits(dmadev, reg, STM32_MDMA_CIFCR_CLTCIF); in stm32_mdma_irq_handler()
1470 stm32_mdma_set_bits(dmadev, reg, status); in stm32_mdma_irq_handler()
1484 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_alloc_chan_resources() local
1497 ret = pm_runtime_resume_and_get(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1503 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_alloc_chan_resources()
1511 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_free_chan_resources() local
1523 pm_runtime_put(dmadev->ddev.dev); in stm32_mdma_free_chan_resources()
1532 struct stm32_mdma_device *dmadev = stm32_mdma_get_dev(chan); in stm32_mdma_filter_fn() local
1535 if (dmadev->chan_reserved & BIT(chan->id)) in stm32_mdma_filter_fn()
1544 struct stm32_mdma_device *dmadev = ofdma->of_dma_data; in stm32_mdma_of_xlate() local
1545 dma_cap_mask_t mask = dmadev->ddev.cap_mask; in stm32_mdma_of_xlate()
1551 dev_err(mdma2dev(dmadev), "Bad number of args\n"); in stm32_mdma_of_xlate()
1562 if (config.request >= dmadev->nr_requests) { in stm32_mdma_of_xlate()
1563 dev_err(mdma2dev(dmadev), "Bad request line\n"); in stm32_mdma_of_xlate()
1568 dev_err(mdma2dev(dmadev), "Priority level not supported\n"); in stm32_mdma_of_xlate()
1574 dev_err(mdma2dev(dmadev), "No more channels available\n"); in stm32_mdma_of_xlate()
1593 struct stm32_mdma_device *dmadev; in stm32_mdma_probe() local
1624 dmadev = devm_kzalloc(&pdev->dev, in stm32_mdma_probe()
1625 struct_size(dmadev, ahb_addr_masks, count), in stm32_mdma_probe()
1627 if (!dmadev) in stm32_mdma_probe()
1629 dmadev->nr_ahb_addr_masks = count; in stm32_mdma_probe()
1631 dmadev->nr_channels = nr_channels; in stm32_mdma_probe()
1632 dmadev->nr_requests = nr_requests; in stm32_mdma_probe()
1634 dmadev->ahb_addr_masks, in stm32_mdma_probe()
1637 dmadev->base = devm_platform_ioremap_resource(pdev, 0); in stm32_mdma_probe()
1638 if (IS_ERR(dmadev->base)) in stm32_mdma_probe()
1639 return PTR_ERR(dmadev->base); in stm32_mdma_probe()
1641 dmadev->clk = devm_clk_get(&pdev->dev, NULL); in stm32_mdma_probe()
1642 if (IS_ERR(dmadev->clk)) in stm32_mdma_probe()
1643 return dev_err_probe(&pdev->dev, PTR_ERR(dmadev->clk), in stm32_mdma_probe()
1646 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_probe()
1663 dd = &dmadev->ddev; in stm32_mdma_probe()
1697 for (i = 0; i < dmadev->nr_channels; i++) { in stm32_mdma_probe()
1698 chan = &dmadev->chan[i]; in stm32_mdma_probe()
1701 if (stm32_mdma_read(dmadev, STM32_MDMA_CCR(i)) & STM32_MDMA_CCR_SM) in stm32_mdma_probe()
1702 dmadev->chan_reserved |= BIT(i); in stm32_mdma_probe()
1708 dmadev->irq = platform_get_irq(pdev, 0); in stm32_mdma_probe()
1709 if (dmadev->irq < 0) { in stm32_mdma_probe()
1710 ret = dmadev->irq; in stm32_mdma_probe()
1714 ret = devm_request_irq(&pdev->dev, dmadev->irq, stm32_mdma_irq_handler, in stm32_mdma_probe()
1715 0, dev_name(&pdev->dev), dmadev); in stm32_mdma_probe()
1725 ret = of_dma_controller_register(of_node, stm32_mdma_of_xlate, dmadev); in stm32_mdma_probe()
1732 platform_set_drvdata(pdev, dmadev); in stm32_mdma_probe()
1743 clk_disable_unprepare(dmadev->clk); in stm32_mdma_probe()
1751 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_suspend() local
1753 clk_disable_unprepare(dmadev->clk); in stm32_mdma_runtime_suspend()
1760 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_runtime_resume() local
1763 ret = clk_prepare_enable(dmadev->clk); in stm32_mdma_runtime_resume()
1776 struct stm32_mdma_device *dmadev = dev_get_drvdata(dev); in stm32_mdma_pm_suspend() local
1784 for (id = 0; id < dmadev->nr_channels; id++) { in stm32_mdma_pm_suspend()
1785 ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(id)); in stm32_mdma_pm_suspend()