267 	u32 ccr;  member
414 	swdesc->ccr = 0;  in stm32_dma3_chan_desc_alloc()
421 	swdesc->ccr &= ~CCR_LAP;  in stm32_dma3_chan_desc_alloc()
552 				   u32 *ccr, u32 *ctr1, u32 *ctr2,  in stm32_dma3_chan_prep_hw()  argument
725 	*ccr |= FIELD_PREP(CCR_PRIO, FIELD_GET(STM32_DMA3_DT_PRIO, ch_conf));  in stm32_dma3_chan_prep_hw()
741 	u32 csr, ccr;  in stm32_dma3_chan_start()  local
755 	writel_relaxed(chan->swdesc->ccr, ddata->base + STM32_DMA3_CCR(id));  in stm32_dma3_chan_start()
770 	ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(id));  in stm32_dma3_chan_start()
771 	writel_relaxed(ccr | CCR_EN, ddata->base + STM32_DMA3_CCR(id));  in stm32_dma3_chan_start()
781 	u32 csr, ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN;  in stm32_dma3_chan_suspend()  local
785 		ccr |= CCR_SUSP;  in stm32_dma3_chan_suspend()
787 		ccr &= ~CCR_SUSP;  in stm32_dma3_chan_suspend()
789 	writel_relaxed(ccr, ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_suspend()
806 	u32 ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & ~CCR_EN;  in stm32_dma3_chan_reset()  local
808 	writel_relaxed(ccr |= CCR_RESET, ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_reset()
848 		writel_relaxed(swdesc->ccr | CCR_SUSP, ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_set_residue()
854 			writel_relaxed(swdesc->ccr, ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_set_residue()
879 		writel_relaxed(swdesc->ccr, ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_set_residue()
942 	u32 ccr;  in stm32_dma3_chan_stop()  local
948 	ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_stop()
949 	writel_relaxed(ccr & ~(CCR_ALLIE | CCR_EN), ddata->base + STM32_DMA3_CCR(chan->id));  in stm32_dma3_chan_stop()
951 	if (!(ccr & CCR_SUSP) && (ccr & CCR_EN)) {  in stm32_dma3_chan_stop()
981 	u32 misr, csr, ccr;  in stm32_dma3_chan_irq()  local
992 	ccr = readl_relaxed(ddata->base + STM32_DMA3_CCR(chan->id)) & CCR_ALLIE;  in stm32_dma3_chan_irq()
994 	if (csr & CSR_TCF && ccr & CCR_TCIE) {  in stm32_dma3_chan_irq()
1001 	if (csr & CSR_USEF && ccr & CCR_USEIE) {  in stm32_dma3_chan_irq()
1009 	if (csr & CSR_ULEF && ccr & CCR_ULEIE) {  in stm32_dma3_chan_irq()
1016 	if (csr & CSR_DTEF && ccr & CCR_DTEIE) {  in stm32_dma3_chan_irq()
1027 	csr &= (ccr | CCR_HTIE);  in stm32_dma3_chan_irq()
1170 		ret = stm32_dma3_chan_prep_hw(chan, DMA_MEM_TO_MEM, &swdesc->ccr, &ctr1, &ctr2,  in stm32_dma3_prep_dma_memcpy()
1180 	swdesc->ccr |= CCR_USEIE | CCR_ULEIE | CCR_DTEIE;  in stm32_dma3_prep_dma_memcpy()
1182 	swdesc->ccr |= CCR_TCIE;  in stm32_dma3_prep_dma_memcpy()
1234 				ret = stm32_dma3_chan_prep_hw(chan, dir, &swdesc->ccr, &ctr1, &ctr2,  in stm32_dma3_prep_slave_sg()
1243 				ret = stm32_dma3_chan_prep_hw(chan, dir, &swdesc->ccr, &ctr1, &ctr2,  in stm32_dma3_prep_slave_sg()
1263 	swdesc->ccr |= CCR_USEIE | CCR_ULEIE | CCR_DTEIE;  in stm32_dma3_prep_slave_sg()
1265 	swdesc->ccr |= CCR_TCIE;  in stm32_dma3_prep_slave_sg()
1308 		ret = stm32_dma3_chan_prep_hw(chan, DMA_MEM_TO_DEV, &swdesc->ccr, &ctr1, &ctr2,  in stm32_dma3_prep_dma_cyclic()
1314 		ret = stm32_dma3_chan_prep_hw(chan, DMA_DEV_TO_MEM, &swdesc->ccr, &ctr1, &ctr2,  in stm32_dma3_prep_dma_cyclic()
1338 	swdesc->ccr |= CCR_USEIE | CCR_ULEIE | CCR_DTEIE;  in stm32_dma3_prep_dma_cyclic()
1340 	swdesc->ccr |= CCR_TCIE;  in stm32_dma3_prep_dma_cyclic()