Lines Matching defs:ioat_chan
121 struct ioatdma_chan *ioat_chan, int idx);
405 struct ioatdma_chan *ioat_chan;
434 ioat_chan = ioat_chan_by_index(ioat_dma, i);
437 "ioat-msix", ioat_chan);
441 ioat_chan = ioat_chan_by_index(ioat_dma, j);
442 devm_free_irq(dev, msix->vector, ioat_chan);
555 struct ioatdma_chan *ioat_chan;
577 ioat_chan = kzalloc(sizeof(*ioat_chan), GFP_KERNEL);
578 if (!ioat_chan)
581 ioat_init_channel(ioat_dma, ioat_chan, i);
582 ioat_chan->xfercap_log = xfercap_log;
583 spin_lock_init(&ioat_chan->prep_lock);
584 if (ioat_reset_hw(ioat_chan)) {
598 struct ioatdma_chan *ioat_chan = to_ioat_chan(c);
599 struct ioatdma_device *ioat_dma = ioat_chan->ioat_dma;
601 const int total_descs = 1 << ioat_chan->alloc_order;
608 if (!ioat_chan->ring)
611 ioat_stop(ioat_chan);
613 if (!test_bit(IOAT_CHAN_DOWN, &ioat_chan->state)) {
614 ioat_reset_hw(ioat_chan);
619 ioat_chan->reg_base +
623 spin_lock_bh(&ioat_chan->cleanup_lock);
624 spin_lock_bh(&ioat_chan->prep_lock);
625 descs = ioat_ring_space(ioat_chan);
626 dev_dbg(to_dev(ioat_chan), "freeing %d idle descriptors\n", descs);
628 desc = ioat_get_ring_ent(ioat_chan, ioat_chan->head + i);
633 dev_err(to_dev(ioat_chan), "Freeing %d in use descriptors!\n",
637 desc = ioat_get_ring_ent(ioat_chan, ioat_chan->tail + i);
638 dump_desc_dbg(ioat_chan, desc);
642 for (i = 0; i < ioat_chan->desc_chunks; i++) {
643 dma_free_coherent(to_dev(ioat_chan), IOAT_CHUNK_SIZE,
644 ioat_chan->descs[i].virt,
645 ioat_chan->descs[i].hw);
646 ioat_chan->descs[i].virt = NULL;
647 ioat_chan->descs[i].hw = 0;
649 ioat_chan->desc_chunks = 0;
651 kfree(ioat_chan->ring);
652 ioat_chan->ring = NULL;
653 ioat_chan->alloc_order = 0;
654 dma_pool_free(ioat_dma->completion_pool, ioat_chan->completion,
655 ioat_chan->completion_dma);
656 spin_unlock_bh(&ioat_chan->prep_lock);
657 spin_unlock_bh(&ioat_chan->cleanup_lock);
659 ioat_chan->last_completion = 0;
660 ioat_chan->completion_dma = 0;
661 ioat_chan->dmacount = 0;
669 struct ioatdma_chan *ioat_chan = to_ioat_chan(c);
677 if (ioat_chan->ring)
678 return 1 << ioat_chan->alloc_order;
681 writew(IOAT_CHANCTRL_RUN, ioat_chan->reg_base + IOAT_CHANCTRL_OFFSET);
685 ioat_chan->completion =
686 dma_pool_zalloc(ioat_chan->ioat_dma->completion_pool,
687 GFP_NOWAIT, &ioat_chan->completion_dma);
688 if (!ioat_chan->completion)
691 writel(((u64)ioat_chan->completion_dma) & 0x00000000FFFFFFFF,
692 ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_LOW);
693 writel(((u64)ioat_chan->completion_dma) >> 32,
694 ioat_chan->reg_base + IOAT_CHANCMP_OFFSET_HIGH);
701 spin_lock_bh(&ioat_chan->cleanup_lock);
702 spin_lock_bh(&ioat_chan->prep_lock);
703 ioat_chan->ring = ring;
704 ioat_chan->head = 0;
705 ioat_chan->issued = 0;
706 ioat_chan->tail = 0;
707 ioat_chan->alloc_order = order;
708 set_bit(IOAT_RUN, &ioat_chan->state);
709 spin_unlock_bh(&ioat_chan->prep_lock);
710 spin_unlock_bh(&ioat_chan->cleanup_lock);
713 if (ioat_chan->ioat_dma->version >= IOAT_VER_3_4) {
719 writel(lat_val, ioat_chan->reg_base +
725 writel(lat_val, ioat_chan->reg_base +
730 ioat_chan->reg_base +
734 ioat_start_null_desc(ioat_chan);
739 status = ioat_chansts(ioat_chan);
743 return 1 << ioat_chan->alloc_order;
745 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
747 dev_WARN(to_dev(ioat_chan),
756 struct ioatdma_chan *ioat_chan, int idx)
760 ioat_chan->ioat_dma = ioat_dma;
761 ioat_chan->reg_base = ioat_dma->reg_base + (0x80 * (idx + 1));
762 spin_lock_init(&ioat_chan->cleanup_lock);
763 ioat_chan->dma_chan.device = dma;
764 dma_cookie_init(&ioat_chan->dma_chan);
765 list_add_tail(&ioat_chan->dma_chan.device_node, &dma->channels);
766 ioat_dma->idx[idx] = ioat_chan;
767 timer_setup(&ioat_chan->timer, ioat_timer_event, 0);
768 tasklet_setup(&ioat_chan->cleanup_task, ioat_cleanup_event);
1054 struct ioatdma_chan *ioat_chan;
1065 ioat_chan = to_ioat_chan(c);
1066 errmask = readl(ioat_chan->reg_base +
1070 writel(errmask, ioat_chan->reg_base +
1082 struct ioatdma_chan *ioat_chan;
1168 ioat_chan = to_ioat_chan(c);
1170 ioat_chan->reg_base + IOAT_DCACTRL_OFFSET);
1212 struct ioatdma_chan *ioat_chan;
1219 ioat_chan = ioat_dma->idx[i];
1220 if (!ioat_chan)
1223 spin_lock_bh(&ioat_chan->prep_lock);
1224 set_bit(IOAT_CHAN_DOWN, &ioat_chan->state);
1225 spin_unlock_bh(&ioat_chan->prep_lock);
1232 timer_delete_sync(&ioat_chan->timer);
1235 ioat_reset_hw(ioat_chan);
1243 struct ioatdma_chan *ioat_chan;
1248 ioat_chan = ioat_dma->idx[i];
1249 if (!ioat_chan)
1252 spin_lock_bh(&ioat_chan->prep_lock);
1253 clear_bit(IOAT_CHAN_DOWN, &ioat_chan->state);
1254 spin_unlock_bh(&ioat_chan->prep_lock);
1256 chanerr = readl(ioat_chan->reg_base + IOAT_CHANERR_OFFSET);
1257 writel(chanerr, ioat_chan->reg_base + IOAT_CHANERR_OFFSET);