234 static void imx_dmav1_writel(struct imxdma_engine *imxdma, unsigned val,  in imx_dmav1_writel()  function
270 		imx_dmav1_writel(imxdma, sg->dma_address,  in imxdma_sg_next()
273 		imx_dmav1_writel(imxdma, sg->dma_address,  in imxdma_sg_next()
276 	imx_dmav1_writel(imxdma, now, DMA_CNTR(imxdmac->channel));  in imxdma_sg_next()
296 	imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);  in imxdma_enable_hw()
297 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) &  in imxdma_enable_hw()
299 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) |  in imxdma_enable_hw()
309 			imx_dmav1_writel(imxdma, tmp | CCR_RPT | CCR_ACRPT,  in imxdma_enable_hw()
329 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_DIMR) |  in imxdma_disable_hw()
331 	imx_dmav1_writel(imxdma, imx_dmav1_readl(imxdma, DMA_CCR(channel)) &  in imxdma_disable_hw()
333 	imx_dmav1_writel(imxdma, 1 << channel, DMA_DISR);  in imxdma_disable_hw()
343 	imx_dmav1_writel(imxdma, 0, DMA_CCR(channel));  in imxdma_watchdog()
368 	imx_dmav1_writel(imxdma, disr & err_mask, DMA_DISR);  in imxdma_err_handler()
376 			imx_dmav1_writel(imxdma, 1 << i, DMA_DBTOSR);  in imxdma_err_handler()
380 			imx_dmav1_writel(imxdma, 1 << i, DMA_DRTOSR);  in imxdma_err_handler()
384 			imx_dmav1_writel(imxdma, 1 << i, DMA_DSESR);  in imxdma_err_handler()
388 			imx_dmav1_writel(imxdma, 1 << i, DMA_DBOSR);  in imxdma_err_handler()
439 				imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));  in dma_irq_handle_channel()
441 				imx_dmav1_writel(imxdma, tmp & ~CCR_CEN,  in dma_irq_handle_channel()
446 			imx_dmav1_writel(imxdma, tmp, DMA_CCR(chno));  in dma_irq_handle_channel()
462 	imx_dmav1_writel(imxdma, 0, DMA_CCR(chno));  in dma_irq_handle_channel()
479 	imx_dmav1_writel(imxdma, disr, DMA_DISR);  in dma_irq_handler()
522 			imx_dmav1_writel(imxdma, d->x, DMA_XSRA);  in imxdma_xfer_desc()
523 			imx_dmav1_writel(imxdma, d->y, DMA_YSRA);  in imxdma_xfer_desc()
524 			imx_dmav1_writel(imxdma, d->w, DMA_WSRA);  in imxdma_xfer_desc()
528 			imx_dmav1_writel(imxdma, d->x, DMA_XSRB);  in imxdma_xfer_desc()
529 			imx_dmav1_writel(imxdma, d->y, DMA_YSRB);  in imxdma_xfer_desc()
530 			imx_dmav1_writel(imxdma, d->w, DMA_WSRB);  in imxdma_xfer_desc()
538 		imx_dmav1_writel(imxdma, d->src, DMA_SAR(imxdmac->channel));  in imxdma_xfer_desc()
539 		imx_dmav1_writel(imxdma, d->dest, DMA_DAR(imxdmac->channel));  in imxdma_xfer_desc()
540 		imx_dmav1_writel(imxdma, d->config_mem | (d->config_port << 2),  in imxdma_xfer_desc()
543 		imx_dmav1_writel(imxdma, d->len, DMA_CNTR(imxdmac->channel));  in imxdma_xfer_desc()
556 			imx_dmav1_writel(imxdma, imxdmac->per_address,  in imxdma_xfer_desc()
558 			imx_dmav1_writel(imxdma, imxdmac->ccr_from_device,  in imxdma_xfer_desc()
567 			imx_dmav1_writel(imxdma, imxdmac->per_address,  in imxdma_xfer_desc()
569 			imx_dmav1_writel(imxdma, imxdmac->ccr_to_device,  in imxdma_xfer_desc()
694 	imx_dmav1_writel(imxdma, imxdmac->dma_request,  in imxdma_config_write()
698 	imx_dmav1_writel(imxdma, imxdmac->watermark_level *  in imxdma_config_write()
1071 	imx_dmav1_writel(imxdma, DCR_DRST, DMA_DCR);  in imxdma_probe()
1098 	imx_dmav1_writel(imxdma, DCR_DEN, DMA_DCR);  in imxdma_probe()
1101 	imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DISR);  in imxdma_probe()
1104 	imx_dmav1_writel(imxdma, (1 << IMX_DMA_CHANNELS) - 1, DMA_DIMR);  in imxdma_probe()