Lines Matching +full:sub +full:- +full:engines
1 /* SPDX-License-Identifier: GPL-2.0 */
364 u64 engines; member
370 /* bytes 0-3 */
374 /* bytes 4-7 */
378 /* bytes 8-11 */
389 /* bytes 12-15 */
394 /* bytes 16-19 */
399 /* bytes 20-23 */
404 /* bytes 24-27 */
411 /* bytes 28-31 */
414 /* bytes 32-63 */
428 * idxd - struct idxd *
429 * n - wq id
430 * ofs - the index of the 32b dword for the config register
439 (__idxd_dev)->wqcfg_offset + (n) * (__idxd_dev)->wqcfg_size + sizeof(u32) * (ofs); \
442 #define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))
449 * idxd - struct idxd *
450 * n - group id
451 * ofs - the index of the 64b qword for the config register
453 * The GRPCFG register block is divided into three sub-registers, which
455 * to the register block that contains the three sub-registers.
459 #define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
461 #define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32)
462 #define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40)