Lines Matching +full:1 +full:- +full:eng
1 /* SPDX-License-Identifier: GPL-2.0 */
35 u64 block_on_fault:1;
36 u64 overlap_copy:1;
37 u64 cache_control_mem:1;
38 u64 cache_control_cache:1;
39 u64 cmd_cap:1;
41 u64 dest_readback:1;
42 u64 drain_readback:1;
45 u64 batch_continuation:1;
49 u64 config_en:1;
62 u64 shared_mode:1;
63 u64 dedicated_mode:1;
64 u64 wq_ats_support:1;
65 u64 priority:1;
66 u64 occupancy:1;
67 u64 occupancy_int:1;
68 u64 op_config:1;
69 u64 wq_prs_support:1;
81 u64 rdbuf_ctrl:1; /* formerly token_en */
82 u64 rdbuf_limit:1; /* formerly token_limit */
83 u64 progress_limit:1; /* descriptor and batch descriptor */
131 u32 user_int_en:1;
132 u32 evl_en:1;
141 u32 softerr_int_en:1;
142 u32 halt_int_en:1;
143 u32 evl_int_en:1;
188 u32 int_req:1;
194 IDXD_CMD_ENABLE_DEVICE = 1,
218 u8 active:1;
268 u64 valid:1;
269 u64 overflow:1;
270 u64 desc_valid:1;
271 u64 wq_idx_valid:1;
272 u64 batch:1;
273 u64 fault_rw:1;
274 u64 priv:1;
275 u64 rsvd:1;
296 u64 dec_aecs_format_ver:1;
297 u64 drop_init_bits:1;
298 u64 chaining:1;
299 u64 force_array_output_mod:1;
300 u64 load_part_aecs:1;
301 u64 comp_early_abort:1;
302 u64 nested_comp:1;
303 u64 diction_comp:1;
304 u64 header_gen:1;
305 u64 crypto_gcm:1;
306 u64 crypto_cfb:1;
307 u64 crypto_xts:1;
318 u64 pasid_en:1;
319 u64 priv:1;
336 u32 ignore:1;
337 u32 pasid_en:1;
348 u64 rsvd:1;
349 u64 use_rdbuf_limit:1;
370 /* bytes 0-3 */
374 /* bytes 4-7 */
378 /* bytes 8-11 */
379 u32 mode:1; /* shared or dedicated */
380 u32 bof:1; /* block on fault */
381 u32 wq_ats_disable:1;
382 u32 wq_prs_disable:1;
385 u32 pasid_en:1;
386 u32 priv:1;
389 /* bytes 12-15 */
394 /* bytes 16-19 */
396 u16 occupancy_table_sel:1;
399 /* bytes 20-23 */
401 u16 occupancy_int_en:1;
404 /* bytes 24-27 */
406 u16 occupancy_int:1;
408 u16 mode_support:1;
411 /* bytes 28-31 */
414 /* bytes 32-63 */
428 * idxd - struct idxd *
429 * n - wq id
430 * ofs - the index of the 32b dword for the config register
439 (__idxd_dev)->wqcfg_offset + (n) * (__idxd_dev)->wqcfg_size + sizeof(u32) * (ofs); \
442 #define WQCFG_STRIDES(_idxd_dev) ((_idxd_dev)->wqcfg_size / sizeof(u32))
449 * idxd - struct idxd *
450 * n - group id
451 * ofs - the index of the 64b qword for the config register
453 * The GRPCFG register block is divided into three sub-registers, which
455 * to the register block that contains the three sub-registers.
459 #define GRPWQCFG_OFFSET(idxd_dev, n, ofs) ((idxd_dev)->grpcfg_offset +\
461 #define GRPENGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 32)
462 #define GRPFLGCFG_OFFSET(idxd_dev, n) ((idxd_dev)->grpcfg_offset + (n) * GRPCFG_SIZE + 40)
475 u64 cap_per_counter:1;
476 u64 writeable_counter:1;
477 u64 counter_freeze:1;
478 u64 overflow_interrupt:1;
519 u32 perfrst_config:1;
520 u32 perfrst_counter:1;
531 u64 enable:1;
532 u64 interrupt_ovf:1;
533 u64 global_freeze_ovf:1;
567 u64 eng:8; member
580 u32 int_pending:1;
581 u32 rsvd3:1;
594 u64 desc_valid:1;
595 u64 wq_idx_valid:1;
596 u64 batch:1;
597 u64 fault_rw:1;
598 u64 priv:1;
599 u64 err_info_valid:1;
618 u16 rci:1;
619 u16 ims:1;
620 u16 rcr:1;
621 u16 first_err_in_batch:1;