Lines Matching refs:axi_dmac_read
196 static int axi_dmac_read(struct axi_dmac *axi_dmac, unsigned int reg)
237 val = axi_dmac_read(dmac, AXI_DMAC_REG_START_TRANSFER);
272 sg->hw->id = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_ID);
336 len = axi_dmac_read(dmac, AXI_DMAC_REG_PARTIAL_XFER_LEN);
337 id = axi_dmac_read(dmac, AXI_DMAC_REG_PARTIAL_XFER_ID);
367 xfer_done = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);
464 pending = axi_dmac_read(dmac, AXI_DMAC_REG_IRQ_PENDING);
475 completed = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_DONE);
953 desc = axi_dmac_read(dmac, AXI_DMAC_REG_INTERFACE_DESC);
998 if (axi_dmac_read(dmac, AXI_DMAC_REG_FLAGS) == AXI_DMAC_FLAG_CYCLIC)
1002 if (axi_dmac_read(dmac, AXI_DMAC_REG_SG_ADDRESS))
1006 if (axi_dmac_read(dmac, AXI_DMAC_REG_Y_LENGTH) == 1)
1010 chan->max_length = axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH);
1015 if (axi_dmac_read(dmac, AXI_DMAC_REG_DEST_ADDRESS) == 0 &&
1023 if (axi_dmac_read(dmac, AXI_DMAC_REG_SRC_ADDRESS) == 0 &&
1036 axi_dmac_read(dmac, AXI_DMAC_REG_X_LENGTH);
1081 version = axi_dmac_read(dmac, ADI_AXI_REG_VERSION);
1131 ret = axi_dmac_read(dmac, AXI_DMAC_REG_COHERENCY_DESC);