Lines Matching full:ad
150 static int admac_alloc_sram_carveout(struct admac_data *ad, in admac_alloc_sram_carveout() argument
156 ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE); in admac_alloc_sram_carveout()
157 ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE); in admac_alloc_sram_carveout()
160 sram = &ad->txcache; in admac_alloc_sram_carveout()
162 sram = &ad->rxcache; in admac_alloc_sram_carveout()
164 mutex_lock(&ad->cache_alloc_lock); in admac_alloc_sram_carveout()
179 mutex_unlock(&ad->cache_alloc_lock); in admac_alloc_sram_carveout()
184 static void admac_free_sram_carveout(struct admac_data *ad, in admac_free_sram_carveout() argument
193 sram = &ad->txcache; in admac_free_sram_carveout()
195 sram = &ad->rxcache; in admac_free_sram_carveout()
200 mutex_lock(&ad->cache_alloc_lock); in admac_free_sram_carveout()
203 mutex_unlock(&ad->cache_alloc_lock); in admac_free_sram_carveout()
206 static void admac_modify(struct admac_data *ad, int reg, u32 mask, u32 val) in admac_modify() argument
208 void __iomem *addr = ad->base + reg; in admac_modify()
287 static void admac_cyclic_write_one_desc(struct admac_data *ad, int channo, in admac_cyclic_write_one_desc() argument
297 dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%lx\n", in admac_cyclic_write_one_desc()
300 writel_relaxed(lower_32_bits(addr), ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
301 writel_relaxed(upper_32_bits(addr), ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
302 writel_relaxed(tx->period_len, ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
303 writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
313 static void admac_cyclic_write_desc(struct admac_data *ad, int channo, in admac_cyclic_write_desc() argument
319 if (readl_relaxed(ad->base + REG_DESC_RING(channo)) & RING_FULL) in admac_cyclic_write_desc()
321 admac_cyclic_write_one_desc(ad, channo, tx); in admac_cyclic_write_desc()
345 static u32 admac_cyclic_read_residue(struct admac_data *ad, int channo, in admac_cyclic_read_residue() argument
353 ring1 = readl_relaxed(ad->base + REG_REPORT_RING(channo)); in admac_cyclic_read_residue()
354 residue1 = readl_relaxed(ad->base + REG_RESIDUE(channo)); in admac_cyclic_read_residue()
355 ring2 = readl_relaxed(ad->base + REG_REPORT_RING(channo)); in admac_cyclic_read_residue()
356 residue2 = readl_relaxed(ad->base + REG_RESIDUE(channo)); in admac_cyclic_read_residue()
378 struct admac_data *ad = adchan->host; in admac_tx_status() local
394 residue = admac_cyclic_read_residue(ad, adchan->no, adtx); in admac_tx_status()
413 struct admac_data *ad = adchan->host; in admac_start_chan() local
417 ad->base + REG_CHAN_INTSTATUS(adchan->no, ad->irq_index)); in admac_start_chan()
419 ad->base + REG_CHAN_INTMASK(adchan->no, ad->irq_index)); in admac_start_chan()
423 writel_relaxed(startbit, ad->base + REG_TX_START); in admac_start_chan()
426 writel_relaxed(startbit, ad->base + REG_RX_START); in admac_start_chan()
436 struct admac_data *ad = adchan->host; in admac_stop_chan() local
441 writel_relaxed(stopbit, ad->base + REG_TX_STOP); in admac_stop_chan()
444 writel_relaxed(stopbit, ad->base + REG_RX_STOP); in admac_stop_chan()
454 struct admac_data *ad = adchan->host; in admac_reset_rings() local
457 ad->base + REG_CHAN_CTL(adchan->no)); in admac_reset_rings()
458 writel_relaxed(0, ad->base + REG_CHAN_CTL(adchan->no)); in admac_reset_rings()
463 struct admac_data *ad = adchan->host; in admac_start_current_tx() local
467 writel_relaxed(0, ad->base + REG_CHAN_CTL(ch)); in admac_start_current_tx()
469 admac_cyclic_write_one_desc(ad, ch, adchan->current_tx); in admac_start_current_tx()
471 admac_cyclic_write_desc(ad, ch, adchan->current_tx); in admac_start_current_tx()
557 struct admac_data *ad = adchan->host; in admac_alloc_chan_resources() local
561 ret = admac_alloc_sram_carveout(ad, admac_chan_direction(adchan->no), in admac_alloc_chan_resources()
567 ad->base + REG_CHAN_SRAM_CARVEOUT(adchan->no)); in admac_alloc_chan_resources()
584 struct admac_data *ad = (struct admac_data *) ofdma->of_dma_data; in admac_dma_of_xlate() local
592 if (index >= ad->nchannels) { in admac_dma_of_xlate()
593 dev_err(ad->dev, "channel index %u out of bounds\n", index); in admac_dma_of_xlate()
597 return dma_get_slave_channel(&ad->channels[index].chan); in admac_dma_of_xlate()
600 static int admac_drain_reports(struct admac_data *ad, int channo) in admac_drain_reports() argument
607 if (readl_relaxed(ad->base + REG_REPORT_RING(channo)) & RING_EMPTY) in admac_drain_reports()
610 countval_lo = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
611 countval_hi = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
612 unk1 = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
613 flags = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
615 dev_dbg(ad->dev, "ch%d report: countval=0x%llx unk1=0x%x flags=0x%x\n", in admac_drain_reports()
622 static void admac_handle_status_err(struct admac_data *ad, int channo) in admac_handle_status_err() argument
626 if (readl_relaxed(ad->base + REG_DESC_RING(channo)) & RING_ERR) { in admac_handle_status_err()
627 writel_relaxed(RING_ERR, ad->base + REG_DESC_RING(channo)); in admac_handle_status_err()
628 dev_err_ratelimited(ad->dev, "ch%d descriptor ring error\n", channo); in admac_handle_status_err()
632 if (readl_relaxed(ad->base + REG_REPORT_RING(channo)) & RING_ERR) { in admac_handle_status_err()
633 writel_relaxed(RING_ERR, ad->base + REG_REPORT_RING(channo)); in admac_handle_status_err()
634 dev_err_ratelimited(ad->dev, "ch%d report ring error\n", channo); in admac_handle_status_err()
639 dev_err(ad->dev, "ch%d unknown error, masking errors as cause of IRQs\n", channo); in admac_handle_status_err()
640 admac_modify(ad, REG_CHAN_INTMASK(channo, ad->irq_index), in admac_handle_status_err()
645 static void admac_handle_status_desc_done(struct admac_data *ad, int channo) in admac_handle_status_desc_done() argument
647 struct admac_chan *adchan = &ad->channels[channo]; in admac_handle_status_desc_done()
652 ad->base + REG_CHAN_INTSTATUS(channo, ad->irq_index)); in admac_handle_status_desc_done()
655 nreports = admac_drain_reports(ad, channo); in admac_handle_status_desc_done()
664 admac_cyclic_write_desc(ad, channo, tx); in admac_handle_status_desc_done()
670 static void admac_handle_chan_int(struct admac_data *ad, int no) in admac_handle_chan_int() argument
672 u32 cause = readl_relaxed(ad->base + REG_CHAN_INTSTATUS(no, ad->irq_index)); in admac_handle_chan_int()
675 admac_handle_status_err(ad, no); in admac_handle_chan_int()
678 admac_handle_status_desc_done(ad, no); in admac_handle_chan_int()
683 struct admac_data *ad = devid; in admac_interrupt() local
687 rx_intstate = readl_relaxed(ad->base + REG_RX_INTSTATE(ad->irq_index)); in admac_interrupt()
688 tx_intstate = readl_relaxed(ad->base + REG_TX_INTSTATE(ad->irq_index)); in admac_interrupt()
689 global_intstate = readl_relaxed(ad->base + REG_GLOBAL_INTSTATE(ad->irq_index)); in admac_interrupt()
694 for (i = 0; i < ad->nchannels; i += 2) { in admac_interrupt()
696 admac_handle_chan_int(ad, i); in admac_interrupt()
700 for (i = 1; i < ad->nchannels; i += 2) { in admac_interrupt()
702 admac_handle_chan_int(ad, i); in admac_interrupt()
707 dev_warn(ad->dev, "clearing unknown global interrupt flag: %x\n", in admac_interrupt()
709 writel_relaxed(~(u32) 0, ad->base + REG_GLOBAL_INTSTATE(ad->irq_index)); in admac_interrupt()
744 struct admac_data *ad = adchan->host; in admac_device_config() local
747 u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) & in admac_device_config()
787 writel_relaxed(bus_width, ad->base + REG_BUS_WIDTH(adchan->no)); in admac_device_config()
798 ad->base + REG_CHAN_FIFOCTL(adchan->no)); in admac_device_config()
806 struct admac_data *ad; in admac_probe() local
817 ad = devm_kzalloc(&pdev->dev, struct_size(ad, channels, nchannels), GFP_KERNEL); in admac_probe()
818 if (!ad) in admac_probe()
821 platform_set_drvdata(pdev, ad); in admac_probe()
822 ad->dev = &pdev->dev; in admac_probe()
823 ad->nchannels = nchannels; in admac_probe()
824 mutex_init(&ad->cache_alloc_lock); in admac_probe()
833 ad->irq_index = i; in admac_probe()
840 ad->irq = irq; in admac_probe()
842 ad->base = devm_platform_ioremap_resource(pdev, 0); in admac_probe()
843 if (IS_ERR(ad->base)) in admac_probe()
844 return dev_err_probe(&pdev->dev, PTR_ERR(ad->base), in admac_probe()
847 ad->rstc = devm_reset_control_get_optional_shared(&pdev->dev, NULL); in admac_probe()
848 if (IS_ERR(ad->rstc)) in admac_probe()
849 return PTR_ERR(ad->rstc); in admac_probe()
851 dma = &ad->dma; in admac_probe()
879 struct admac_chan *adchan = &ad->channels[i]; in admac_probe()
881 adchan->host = ad; in admac_probe()
883 adchan->chan.device = &ad->dma; in admac_probe()
892 err = reset_control_reset(ad->rstc); in admac_probe()
897 err = request_irq(irq, admac_interrupt, 0, dev_name(&pdev->dev), ad); in admac_probe()
904 err = dma_async_device_register(&ad->dma); in admac_probe()
910 err = of_dma_controller_register(pdev->dev.of_node, admac_dma_of_xlate, ad); in admac_probe()
912 dma_async_device_unregister(&ad->dma); in admac_probe()
922 free_irq(ad->irq, ad); in admac_probe()
924 reset_control_rearm(ad->rstc); in admac_probe()
930 struct admac_data *ad = platform_get_drvdata(pdev); in admac_remove() local
933 dma_async_device_unregister(&ad->dma); in admac_remove()
934 free_irq(ad->irq, ad); in admac_remove()
935 reset_control_rearm(ad->rstc); in admac_remove()