Lines Matching +full:ppmu +full:- +full:event2 +full:- +full:dmc0
1 // SPDX-License-Identifier: GPL-2.0-only
3 * exynos_ppmu.c - Exynos PPMU (Platform Performance Monitoring Unit) support
5 * Copyright (c) 2014-2015 Samsung Electronics Co., Ltd.
20 #include <linux/devfreq-event.h>
22 #include "exynos-ppmu.h"
41 struct exynos_ppmu_data ppmu; member
46 { "ppmu-event0-"#name, PPMU_PMNCNT0 }, \
47 { "ppmu-event1-"#name, PPMU_PMNCNT1 }, \
48 { "ppmu-event2-"#name, PPMU_PMNCNT2 }, \
49 { "ppmu-event3-"#name, PPMU_PMNCNT3 }
60 PPMU_EVENT(dmc0),
72 PPMU_EVENT(mfc-left),
73 PPMU_EVENT(mfc-right),
76 PPMU_EVENT(drex0-s0),
77 PPMU_EVENT(drex0-s1),
78 PPMU_EVENT(drex1-s0),
79 PPMU_EVENT(drex1-s1),
90 PPMU_EVENT(d0-cpu),
91 PPMU_EVENT(d0-general),
92 PPMU_EVENT(d0-rt),
93 PPMU_EVENT(d1-cpu),
94 PPMU_EVENT(d1-general),
95 PPMU_EVENT(d1-rt),
103 PPMU_EVENT(dmc0-0),
104 PPMU_EVENT(dmc0-1),
105 PPMU_EVENT(dmc1-0),
106 PPMU_EVENT(dmc1-1),
117 return -EINVAL; in __exynos_ppmu_find_ppmu_id()
122 return __exynos_ppmu_find_ppmu_id(edev->desc->name); in exynos_ppmu_find_ppmu_id()
126 * The devfreq-event ops structure for PPMU v1.1
135 ret = regmap_write(info->regmap, PPMU_CNTENC, in exynos_ppmu_disable()
144 /* Disable PPMU */ in exynos_ppmu_disable()
145 ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); in exynos_ppmu_disable()
150 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_disable()
168 ret = regmap_read(info->regmap, PPMU_CNTENS, &cntens); in exynos_ppmu_set_event()
173 ret = regmap_write(info->regmap, PPMU_CNTENS, cntens); in exynos_ppmu_set_event()
178 ret = regmap_write(info->regmap, PPMU_BEVTxSEL(id), in exynos_ppmu_set_event()
179 edev->desc->event_type); in exynos_ppmu_set_event()
183 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_set_event()
184 ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); in exynos_ppmu_set_event()
194 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_set_event()
212 return -EINVAL; in exynos_ppmu_get_event()
214 /* Disable PPMU */ in exynos_ppmu_get_event()
215 ret = regmap_read(info->regmap, PPMU_PMNC, &pmnc); in exynos_ppmu_get_event()
220 ret = regmap_write(info->regmap, PPMU_PMNC, pmnc); in exynos_ppmu_get_event()
225 ret = regmap_read(info->regmap, PPMU_CCNT, &total_count); in exynos_ppmu_get_event()
228 edata->total_count = total_count; in exynos_ppmu_get_event()
235 ret = regmap_read(info->regmap, PPMU_PMNCT(id), &load_count); in exynos_ppmu_get_event()
238 edata->load_count = load_count; in exynos_ppmu_get_event()
241 ret = regmap_read(info->regmap, PPMU_PMCNT3_HIGH, &pmcnt3_high); in exynos_ppmu_get_event()
245 ret = regmap_read(info->regmap, PPMU_PMCNT3_LOW, &pmcnt3_low); in exynos_ppmu_get_event()
249 edata->load_count = ((pmcnt3_high << 8) | pmcnt3_low); in exynos_ppmu_get_event()
252 return -EINVAL; in exynos_ppmu_get_event()
256 ret = regmap_read(info->regmap, PPMU_CNTENC, &cntenc); in exynos_ppmu_get_event()
261 ret = regmap_write(info->regmap, PPMU_CNTENC, cntenc); in exynos_ppmu_get_event()
265 dev_dbg(&edev->dev, "%s (event: %ld/%ld)\n", edev->desc->name, in exynos_ppmu_get_event()
266 edata->load_count, edata->total_count); in exynos_ppmu_get_event()
278 * The devfreq-event ops structure for PPMU v2.0
289 ret = regmap_write(info->regmap, PPMU_V2_FLAG, clear); in exynos_ppmu_v2_disable()
293 ret = regmap_write(info->regmap, PPMU_V2_INTENC, clear); in exynos_ppmu_v2_disable()
297 ret = regmap_write(info->regmap, PPMU_V2_CNTENC, clear); in exynos_ppmu_v2_disable()
301 ret = regmap_write(info->regmap, PPMU_V2_CNT_RESET, clear); in exynos_ppmu_v2_disable()
305 ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG0, 0x0); in exynos_ppmu_v2_disable()
309 ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG1, 0x0); in exynos_ppmu_v2_disable()
313 ret = regmap_write(info->regmap, PPMU_V2_CIG_CFG2, 0x0); in exynos_ppmu_v2_disable()
317 ret = regmap_write(info->regmap, PPMU_V2_CIG_RESULT, 0x0); in exynos_ppmu_v2_disable()
321 ret = regmap_write(info->regmap, PPMU_V2_CNT_AUTO, 0x0); in exynos_ppmu_v2_disable()
325 ret = regmap_write(info->regmap, PPMU_V2_CH_EV0_TYPE, 0x0); in exynos_ppmu_v2_disable()
329 ret = regmap_write(info->regmap, PPMU_V2_CH_EV1_TYPE, 0x0); in exynos_ppmu_v2_disable()
333 ret = regmap_write(info->regmap, PPMU_V2_CH_EV2_TYPE, 0x0); in exynos_ppmu_v2_disable()
337 ret = regmap_write(info->regmap, PPMU_V2_CH_EV3_TYPE, 0x0); in exynos_ppmu_v2_disable()
341 ret = regmap_write(info->regmap, PPMU_V2_SM_ID_V, 0x0); in exynos_ppmu_v2_disable()
345 ret = regmap_write(info->regmap, PPMU_V2_SM_ID_A, 0x0); in exynos_ppmu_v2_disable()
349 ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_V, 0x0); in exynos_ppmu_v2_disable()
353 ret = regmap_write(info->regmap, PPMU_V2_SM_OTHERS_A, 0x0); in exynos_ppmu_v2_disable()
357 ret = regmap_write(info->regmap, PPMU_V2_INTERRUPT_RESET, 0x0); in exynos_ppmu_v2_disable()
361 /* Disable PPMU */ in exynos_ppmu_v2_disable()
362 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); in exynos_ppmu_v2_disable()
367 ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); in exynos_ppmu_v2_disable()
382 ret = regmap_read(info->regmap, PPMU_V2_CNTENS, &cntens); in exynos_ppmu_v2_set_event()
387 ret = regmap_write(info->regmap, PPMU_V2_CNTENS, cntens); in exynos_ppmu_v2_set_event()
392 ret = regmap_write(info->regmap, PPMU_V2_CH_EVx_TYPE(id), in exynos_ppmu_v2_set_event()
393 edev->desc->event_type); in exynos_ppmu_v2_set_event()
397 /* Reset cycle counter/performance counter and enable PPMU */ in exynos_ppmu_v2_set_event()
398 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); in exynos_ppmu_v2_set_event()
412 ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); in exynos_ppmu_v2_set_event()
430 /* Disable PPMU */ in exynos_ppmu_v2_get_event()
431 ret = regmap_read(info->regmap, PPMU_V2_PMNC, &pmnc); in exynos_ppmu_v2_get_event()
436 ret = regmap_write(info->regmap, PPMU_V2_PMNC, pmnc); in exynos_ppmu_v2_get_event()
441 ret = regmap_read(info->regmap, PPMU_V2_CCNT, &total_count); in exynos_ppmu_v2_get_event()
444 edata->total_count = total_count; in exynos_ppmu_v2_get_event()
450 ret = regmap_read(info->regmap, PPMU_V2_PMNCT(id), &count); in exynos_ppmu_v2_get_event()
456 ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_HIGH, in exynos_ppmu_v2_get_event()
461 ret = regmap_read(info->regmap, PPMU_V2_PMCNT3_LOW, &pmcnt_low); in exynos_ppmu_v2_get_event()
468 edata->load_count = load_count; in exynos_ppmu_v2_get_event()
471 ret = regmap_read(info->regmap, PPMU_V2_CNTENC, &cntenc); in exynos_ppmu_v2_get_event()
476 ret = regmap_write(info->regmap, PPMU_V2_CNTENC, cntenc); in exynos_ppmu_v2_get_event()
480 dev_dbg(&edev->dev, "%25s (load: %ld / %ld)\n", edev->desc->name, in exynos_ppmu_v2_get_event()
481 edata->load_count, edata->total_count); in exynos_ppmu_v2_get_event()
493 .compatible = "samsung,exynos-ppmu",
496 .compatible = "samsung,exynos-ppmu-v2",
507 struct device *dev = info->dev; in of_get_devfreq_events()
515 "failed to get child node of devfreq-event devices\n"); in of_get_devfreq_events()
516 return -EINVAL; in of_get_devfreq_events()
523 return -ENOMEM; in of_get_devfreq_events()
525 info->num_events = count; in of_get_devfreq_events()
527 info->ppmu_type = (enum exynos_ppmu_type)device_get_match_data(dev); in of_get_devfreq_events()
546 switch (info->ppmu_type) { in of_get_devfreq_events()
557 of_property_read_string(node, "event-name", &desc[j].name); in of_get_devfreq_events()
558 ret = of_property_read_u32(node, "event-data-type", in of_get_devfreq_events()
565 if (info->ppmu_type == EXYNOS_TYPE_PPMU_V2) { in of_get_devfreq_events()
589 info->desc = desc; in of_get_devfreq_events()
605 struct device *dev = info->dev; in exynos_ppmu_parse_dt()
606 struct device_node *np = dev->of_node; in exynos_ppmu_parse_dt()
613 return -EINVAL; in exynos_ppmu_parse_dt()
616 /* Maps the memory mapped IO to control PPMU register */ in exynos_ppmu_parse_dt()
621 exynos_ppmu_regmap_config.max_register = resource_size(res) - 4; in exynos_ppmu_parse_dt()
622 info->regmap = devm_regmap_init_mmio(dev, base, in exynos_ppmu_parse_dt()
624 if (IS_ERR(info->regmap)) { in exynos_ppmu_parse_dt()
626 return PTR_ERR(info->regmap); in exynos_ppmu_parse_dt()
629 info->ppmu.clk = devm_clk_get(dev, "ppmu"); in exynos_ppmu_parse_dt()
630 if (IS_ERR(info->ppmu.clk)) { in exynos_ppmu_parse_dt()
631 info->ppmu.clk = NULL; in exynos_ppmu_parse_dt()
632 dev_warn(dev, "cannot get PPMU clock\n"); in exynos_ppmu_parse_dt()
637 dev_err(dev, "failed to parse exynos ppmu dt node\n"); in exynos_ppmu_parse_dt()
651 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); in exynos_ppmu_probe()
653 return -ENOMEM; in exynos_ppmu_probe()
655 info->dev = &pdev->dev; in exynos_ppmu_probe()
660 dev_err(&pdev->dev, in exynos_ppmu_probe()
664 desc = info->desc; in exynos_ppmu_probe()
666 size = sizeof(struct devfreq_event_dev *) * info->num_events; in exynos_ppmu_probe()
667 info->edev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL); in exynos_ppmu_probe()
668 if (!info->edev) in exynos_ppmu_probe()
669 return -ENOMEM; in exynos_ppmu_probe()
671 edev = info->edev; in exynos_ppmu_probe()
674 for (i = 0; i < info->num_events; i++) { in exynos_ppmu_probe()
675 edev[i] = devm_devfreq_event_add_edev(&pdev->dev, &desc[i]); in exynos_ppmu_probe()
677 dev_err(&pdev->dev, in exynos_ppmu_probe()
678 "failed to add devfreq-event device\n"); in exynos_ppmu_probe()
682 pr_info("exynos-ppmu: new PPMU device registered %s (%s)\n", in exynos_ppmu_probe()
683 dev_name(&pdev->dev), desc[i].name); in exynos_ppmu_probe()
686 ret = clk_prepare_enable(info->ppmu.clk); in exynos_ppmu_probe()
688 dev_err(&pdev->dev, "failed to prepare ppmu clock\n"); in exynos_ppmu_probe()
699 clk_disable_unprepare(info->ppmu.clk); in exynos_ppmu_remove()
706 .name = "exynos-ppmu",
712 MODULE_DESCRIPTION("Exynos PPMU(Platform Performance Monitoring Unit) driver");