Lines Matching +full:te +full:- +full:source
1 // SPDX-License-Identifier: GPL-2.0
56 __string(host, dev_name(dev->parent))
64 __entry->status = status;
65 __entry->first_error = fe;
70 memcpy(__entry->header_log, hl, CXL_HEADERLOG_SIZE);
74 show_uc_errs(__entry->status),
75 show_uc_errs(__entry->first_error)
83 __string(memdev, dev_name(&cxlmd->dev))
84 __string(host, dev_name(cxlmd->dev.parent))
93 __entry->serial = cxlmd->cxlds->serial;
94 __entry->status = status;
95 __entry->first_error = fe;
100 memcpy(__entry->header_log, hl, CXL_HEADERLOG_SIZE);
103 __get_str(memdev), __get_str(host), __entry->serial,
104 show_uc_errs(__entry->status),
105 show_uc_errs(__entry->first_error)
132 __string(host, dev_name(dev->parent))
138 __entry->status = status;
142 show_ce_errs(__entry->status)
150 __string(memdev, dev_name(&cxlmd->dev))
151 __string(host, dev_name(cxlmd->dev.parent))
158 __entry->serial = cxlmd->cxlds->serial;
159 __entry->status = status;
162 __get_str(memdev), __get_str(host), __entry->serial,
163 show_ce_errs(__entry->status)
182 __string(memdev, dev_name(&cxlmd->dev))
183 __string(host, dev_name(cxlmd->dev.parent))
194 __entry->serial = cxlmd->cxlds->serial;
195 __entry->log = log;
196 __entry->count = le16_to_cpu(payload->overflow_err_count);
197 __entry->first_ts = le64_to_cpu(payload->first_overflow_timestamp);
198 __entry->last_ts = le64_to_cpu(payload->last_overflow_timestamp);
202 __get_str(memdev), __get_str(host), __entry->serial,
203 cxl_event_log_type_str(__entry->log), __entry->count,
204 __entry->first_ts, __entry->last_ts)
210 * CXL 3.0 section 8.2.9.2.1; Table 8-42
243 __string(memdev, dev_name(&cxlmd->dev)) \
244 __string(host, dev_name(cxlmd->dev.parent)) \
261 __entry->log = (l); \
262 __entry->serial = (cxlmd)->cxlds->serial; \
263 __entry->hdr_length = (hdr).length; \
264 __entry->hdr_flags = get_unaligned_le24((hdr).flags); \
265 __entry->hdr_handle = le16_to_cpu((hdr).handle); \
266 __entry->hdr_related_handle = le16_to_cpu((hdr).related_handle); \
267 __entry->hdr_timestamp = le64_to_cpu((hdr).timestamp); \
268 __entry->hdr_maint_op_class = (hdr).maint_op_class; \
269 __entry->hdr_maint_op_sub_class = (hdr).maint_op_sub_class; \
270 __entry->hdr_ld_id = le16_to_cpu((hdr).ld_id); \
271 __entry->hdr_head_id = (hdr).head_id
278 __get_str(memdev), __get_str(host), __entry->serial, \
279 cxl_event_log_type_str(__entry->log), \
280 __entry->hdr_timestamp, &__entry->hdr_uuid, __entry->hdr_length,\
281 show_hdr_flags(__entry->hdr_flags), __entry->hdr_handle, \
282 __entry->hdr_related_handle, __entry->hdr_maint_op_class, \
283 __entry->hdr_maint_op_sub_class, \
284 __entry->hdr_ld_id, __entry->hdr_head_id, \
300 CXL_EVT_TP_fast_assign(cxlmd, log, gen_rec->hdr);
301 memcpy(&__entry->hdr_uuid, uuid, sizeof(uuid_t));
302 memcpy(__entry->data, gen_rec->data, CXL_EVENT_RECORD_DATA_LENGTH);
306 __print_hex(__entry->data, CXL_EVENT_RECORD_DATA_LENGTH))
313 * CXL rev 3.0 Section 8.2.9.2.1.1; Table 8-43
316 * CXL rev 3.0 section 8.2.9.2.1.2; Table 8-44
330 * CXL 3.1 section 8.2.9.2.1; Table 8-44
351 * General Media Event Record - GMER
352 * CXL rev 3.1 Section 8.2.9.2.1.1; Table 8-45
374 { CXL_GMER_MEM_EVT_TYPE_TE_STATE_VIOLATION, "TE State Violation" }, \
477 __string(region_name, cxlr ? dev_name(&cxlr->dev) : "")
481 CXL_EVT_TP_fast_assign(cxlmd, log, rec->media_hdr.hdr);
482 __entry->hdr_uuid = CXL_EVENT_GEN_MEDIA_UUID;
485 __entry->dpa = le64_to_cpu(rec->media_hdr.phys_addr);
486 __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK;
488 __entry->dpa &= CXL_DPA_MASK;
489 __entry->descriptor = rec->media_hdr.descriptor;
490 __entry->type = rec->media_hdr.type;
491 __entry->sub_type = rec->sub_type;
492 __entry->transaction_type = rec->media_hdr.transaction_type;
493 __entry->channel = rec->media_hdr.channel;
494 __entry->rank = rec->media_hdr.rank;
495 __entry->device = get_unaligned_le24(rec->device);
496 memcpy(__entry->comp_id, &rec->component_id,
498 __entry->validity_flags = get_unaligned_le16(&rec->media_hdr.validity_flags);
499 __entry->hpa = hpa;
500 __entry->hpa_alias0 = hpa_alias0;
503 uuid_copy(&__entry->region_uuid, &cxlr->params.uuid);
506 uuid_copy(&__entry->region_uuid, &uuid_null);
508 __entry->cme_threshold_ev_flags = rec->cme_threshold_ev_flags;
509 if (rec->media_hdr.descriptor & CXL_GMER_EVT_DESC_THRESHOLD_EVENT)
510 __entry->cme_count = get_unaligned_le24(rec->cme_count);
512 __entry->cme_count = 0;
523 __entry->dpa, show_dpa_flags(__entry->dpa_flags),
524 show_event_desc_flags(__entry->descriptor),
525 show_gmer_mem_event_type(__entry->type),
526 show_mem_event_sub_type(__entry->sub_type),
527 show_trans_type(__entry->transaction_type),
528 __entry->channel, __entry->rank, __entry->device,
529 show_valid_flags(__entry->validity_flags),
530 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
531 show_comp_id_pldm_flags(__entry->comp_id[0]),
532 show_pldm_entity_id(__entry->validity_flags, CXL_GMER_VALID_COMPONENT,
533 CXL_GMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
534 show_pldm_resource_id(__entry->validity_flags, CXL_GMER_VALID_COMPONENT,
535 CXL_GMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
536 __entry->hpa, __entry->hpa_alias0, __get_str(region_name), &__entry->region_uuid,
537 show_cme_threshold_ev_flags(__entry->cme_threshold_ev_flags), __entry->cme_count
542 * DRAM Event Record - DER
544 * CXL rev 3.1 section 8.2.9.2.1.2; Table 8-46
562 { CXL_DER_MEM_EVT_TYPE_TE_STATE_VIOLATION, "TE State Violation" }, \
626 __string(region_name, cxlr ? dev_name(&cxlr->dev) : "")
630 CXL_EVT_TP_fast_assign(cxlmd, log, rec->media_hdr.hdr);
631 __entry->hdr_uuid = CXL_EVENT_DRAM_UUID;
634 __entry->dpa = le64_to_cpu(rec->media_hdr.phys_addr);
635 __entry->dpa_flags = __entry->dpa & CXL_DPA_FLAGS_MASK;
636 __entry->dpa &= CXL_DPA_MASK;
637 __entry->descriptor = rec->media_hdr.descriptor;
638 __entry->type = rec->media_hdr.type;
639 __entry->sub_type = rec->sub_type;
640 __entry->transaction_type = rec->media_hdr.transaction_type;
641 __entry->validity_flags = get_unaligned_le16(rec->media_hdr.validity_flags);
642 __entry->channel = rec->media_hdr.channel;
643 __entry->rank = rec->media_hdr.rank;
644 __entry->nibble_mask = get_unaligned_le24(rec->nibble_mask);
645 __entry->bank_group = rec->bank_group;
646 __entry->bank = rec->bank;
647 __entry->row = get_unaligned_le24(rec->row);
648 __entry->column = get_unaligned_le16(rec->column);
649 memcpy(__entry->cor_mask, &rec->correction_mask,
651 __entry->hpa = hpa;
652 __entry->hpa_alias0 = hpa_alias0;
655 uuid_copy(&__entry->region_uuid, &cxlr->params.uuid);
658 uuid_copy(&__entry->region_uuid, &uuid_null);
660 memcpy(__entry->comp_id, &rec->component_id,
662 __entry->sub_channel = rec->sub_channel;
663 __entry->cme_threshold_ev_flags = rec->cme_threshold_ev_flags;
664 if (rec->media_hdr.descriptor & CXL_GMER_EVT_DESC_THRESHOLD_EVENT)
665 __entry->cvme_count = get_unaligned_le24(rec->cvme_count);
667 __entry->cvme_count = 0;
678 __entry->dpa, show_dpa_flags(__entry->dpa_flags),
679 show_event_desc_flags(__entry->descriptor),
680 show_dram_mem_event_type(__entry->type),
681 show_mem_event_sub_type(__entry->sub_type),
682 show_trans_type(__entry->transaction_type),
683 __entry->channel, __entry->rank, __entry->nibble_mask,
684 __entry->bank_group, __entry->bank,
685 __entry->row, __entry->column,
686 __print_hex(__entry->cor_mask, CXL_EVENT_DER_CORRECTION_MASK_SIZE),
687 show_dram_valid_flags(__entry->validity_flags),
688 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
689 show_comp_id_pldm_flags(__entry->comp_id[0]),
690 show_pldm_entity_id(__entry->validity_flags, CXL_DER_VALID_COMPONENT,
691 CXL_DER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
692 show_pldm_resource_id(__entry->validity_flags, CXL_DER_VALID_COMPONENT,
693 CXL_DER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
694 __entry->hpa, __entry->hpa_alias0, __get_str(region_name), &__entry->region_uuid,
695 __entry->sub_channel, show_cme_threshold_ev_flags(__entry->cme_threshold_ev_flags),
696 __entry->cvme_count
701 * Memory Module Event Record - MMER
703 * CXL res 3.1 section 8.2.9.2.1.3; Table 8-47
727 * Device Health Information - DHI
729 * CXL res 3.1 section 8.2.9.9.3.1; Table 8-133
841 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
842 __entry->hdr_uuid = CXL_EVENT_MEM_MODULE_UUID;
845 __entry->event_type = rec->event_type;
846 __entry->event_sub_type = rec->event_sub_type;
849 __entry->health_status = rec->info.health_status;
850 __entry->media_status = rec->info.media_status;
851 __entry->life_used = rec->info.life_used;
852 __entry->dirty_shutdown_cnt = get_unaligned_le32(rec->info.dirty_shutdown_cnt);
853 __entry->cor_vol_err_cnt = get_unaligned_le32(rec->info.cor_vol_err_cnt);
854 __entry->cor_per_err_cnt = get_unaligned_le32(rec->info.cor_per_err_cnt);
855 __entry->device_temp = get_unaligned_le16(rec->info.device_temp);
856 __entry->add_status = rec->info.add_status;
857 __entry->validity_flags = get_unaligned_le16(rec->validity_flags);
858 memcpy(__entry->comp_id, &rec->component_id,
869 show_dev_evt_type(__entry->event_type),
870 show_dev_event_sub_type(__entry->event_sub_type),
871 show_health_status_flags(__entry->health_status),
872 show_media_status(__entry->media_status),
873 show_two_bit_status(CXL_DHI_AS_LIFE_USED(__entry->add_status)),
874 show_two_bit_status(CXL_DHI_AS_DEV_TEMP(__entry->add_status)),
875 show_one_bit_status(CXL_DHI_AS_COR_VOL_ERR_CNT(__entry->add_status)),
876 show_one_bit_status(CXL_DHI_AS_COR_PER_ERR_CNT(__entry->add_status)),
877 __entry->life_used, __entry->device_temp,
878 __entry->dirty_shutdown_cnt, __entry->cor_vol_err_cnt,
879 __entry->cor_per_err_cnt,
880 show_mem_module_valid_flags(__entry->validity_flags),
881 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
882 show_comp_id_pldm_flags(__entry->comp_id[0]),
883 show_pldm_entity_id(__entry->validity_flags, CXL_MMER_VALID_COMPONENT,
884 CXL_MMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
885 show_pldm_resource_id(__entry->validity_flags, CXL_MMER_VALID_COMPONENT,
886 CXL_MMER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id)
891 * Memory Sparing Event Record - MSER
893 * CXL rev 3.2 section 8.2.10.2.1.4; Table 8-60
954 CXL_EVT_TP_fast_assign(cxlmd, log, rec->hdr);
955 __entry->hdr_uuid = CXL_EVENT_MEM_SPARING_UUID;
958 __entry->flags = rec->flags;
959 __entry->result = rec->result;
960 __entry->validity_flags = le16_to_cpu(rec->validity_flags);
961 __entry->res_avail = le16_to_cpu(rec->res_avail);
962 __entry->channel = rec->channel;
963 __entry->rank = rec->rank;
964 __entry->nibble_mask = get_unaligned_le24(rec->nibble_mask);
965 __entry->bank_group = rec->bank_group;
966 __entry->bank = rec->bank;
967 __entry->row = get_unaligned_le24(rec->row);
968 __entry->column = le16_to_cpu(rec->column);
969 __entry->sub_channel = rec->sub_channel;
970 memcpy(__entry->comp_id, &rec->component_id,
980 show_mem_sparing_flags(__entry->flags),
981 __entry->result,
982 show_mem_sparing_valid_flags(__entry->validity_flags),
983 __entry->res_avail, __entry->channel, __entry->rank,
984 __entry->nibble_mask, __entry->bank_group, __entry->bank,
985 __entry->row, __entry->column, __entry->sub_channel,
986 __print_hex(__entry->comp_id, CXL_EVENT_GEN_MED_COMP_ID_SIZE),
987 show_comp_id_pldm_flags(__entry->comp_id[0]),
988 show_pldm_entity_id(__entry->validity_flags, CXL_MSER_VALID_COMPONENT_ID,
989 CXL_MSER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id),
990 show_pldm_resource_id(__entry->validity_flags, CXL_MSER_VALID_COMPONENT_ID,
991 CXL_MSER_VALID_COMPONENT_ID_FORMAT, __entry->comp_id)
1001 #define __show_poison_source(source) \ argument
1002 __print_symbolic(source, \
1009 #define show_poison_source(source) \ argument
1010 (((source > CXL_POISON_SOURCE_INJECTED) && \
1011 (source != CXL_POISON_SOURCE_VENDOR)) ? "Reserved" \
1012 : __show_poison_source(source))
1021 (le64_to_cpu(record->address))
1027 (le32_to_cpu(record->length) * CXL_POISON_LEN_MULT)
1040 __string(memdev, dev_name(&cxlmd->dev))
1041 __string(host, dev_name(cxlmd->dev.parent))
1044 __string(region, cxlr ? dev_name(&cxlr->dev) : "")
1051 __field(u8, source)
1058 __entry->serial = cxlmd->cxlds->serial;
1059 __entry->overflow_ts = cxl_poison_overflow(flags, overflow_ts);
1060 __entry->dpa = cxl_poison_record_dpa(record);
1061 __entry->dpa_length = cxl_poison_record_dpa_length(record);
1062 __entry->source = cxl_poison_record_source(record);
1063 __entry->trace_type = trace_type;
1064 __entry->flags = flags;
1067 memcpy(__entry->uuid, &cxlr->params.uuid, 16);
1068 __entry->hpa = cxl_dpa_to_hpa(cxlr, cxlmd,
1069 __entry->dpa);
1070 if (__entry->hpa != ULLONG_MAX && cxlr->params.cache_size)
1071 __entry->hpa_alias0 = __entry->hpa -
1072 cxlr->params.cache_size;
1074 __entry->hpa_alias0 = ULLONG_MAX;
1077 memset(__entry->uuid, 0, 16);
1078 __entry->hpa = ULLONG_MAX;
1079 __entry->hpa_alias0 = ULLONG_MAX;
1085 "dpa_length=0x%x source=%s flags=%s overflow_time=%llu",
1088 __entry->serial,
1089 show_poison_trace_type(__entry->trace_type),
1091 __entry->uuid,
1092 __entry->hpa,
1093 __entry->hpa_alias0,
1094 __entry->dpa,
1095 __entry->dpa_length,
1096 show_poison_source(__entry->source),
1097 show_poison_flags(__entry->flags),
1098 __entry->overflow_ts