36 	 * Scoped Latency and Bandwidth Information Structure in Coherent Device  in cdat_normalize()
602  * Transient context for containing the current calculation of bandwidth when
611  * cxl_endpoint_gather_bandwidth - collect all the endpoint bandwidth in an xarray
612  * @cxlr: CXL region for the bandwidth calculation
614  * @usp_xa: (output) the xarray that collects all the bandwidth coordinates
620  * Collects aggregated endpoint bandwidth and store the bandwidth in
622  * device. Each endpoint consists the minimum of the bandwidth from DSLBIS
623  * from the endpoint CDAT, the endpoint upstream link bandwidth, and the
624  * bandwidth from the SSLBIS of the switch CDAT for the switch upstream port to
683 	/* Direct upstream link from EP bandwidth */  in cxl_endpoint_gather_bandwidth()
689 	 * Min of upstream link bandwidth and Endpoint CDAT bandwidth from  in cxl_endpoint_gather_bandwidth()
701 		 * associated with the endpoint bandwidth.  in cxl_endpoint_gather_bandwidth()
709 		 * bandwidth  in cxl_endpoint_gather_bandwidth()
715 	 * Aggregate the computed bandwidth with the current aggregated bandwidth  in cxl_endpoint_gather_bandwidth()
739  * cxl_switch_gather_bandwidth - collect all the bandwidth at switch level in an xarray  in DEFINE_FREE()
749  * bandwidth, the upstream link bandwidth, and the SSLBIS of the upstream  in DEFINE_FREE()
750  * switch if exists. Sum the resulting bandwidth under the switch upstream  in DEFINE_FREE()
817 		/* Retrieve the upstream link bandwidth */  in DEFINE_FREE()
823 		 * Take the min of downstream bandwidth and the upstream link  in DEFINE_FREE()
824 		 * bandwidth.  in DEFINE_FREE()
829 		 * Take the min of the calculated bandwidth and the upstream  in DEFINE_FREE()
830 		 * switch SSLBIS bandwidth if there's a parent switch  in DEFINE_FREE()
836 		 * Aggregate the calculated bandwidth common to an upstream  in DEFINE_FREE()
846 				"Asymmetric hierarchy detected, bandwidth not updated\n");  in DEFINE_FREE()
856  * cxl_rp_gather_bandwidth - handle the root port level bandwidth collection
857  * @xa: the xarray that holds the cxl_perf_ctx that has the bandwidth calculated
900  * cxl_hb_gather_bandwidth - handle the host bridge level bandwidth collection
901  * @xa: the xarray that holds the cxl_perf_ctx that has the bandwidth calculated
950  * cxl_region_update_bandwidth - Update the bandwidth access coordinates of a region
952  * @input_xa: xarray holds cxl_perf_ctx with calculated bandwidth per ACPI0017 instance
972  * cxl_region_shared_upstream_bandwidth_update - Recalculate the bandwidth for
976  * The function walks the topology from bottom up and calculates the bandwidth. It
997 	/* Collect bandwidth data from all the endpoints. */  in cxl_region_shared_upstream_bandwidth_update()
1011 			"Asymmetric hierarchy detected, bandwidth not updated\n");  in cxl_region_shared_upstream_bandwidth_update()
1016 	 * Walk up one or more switches to deal with the bandwidth of the  in cxl_region_shared_upstream_bandwidth_update()
1031 	/* Handle the bandwidth at the root port of the hierarchy */  in cxl_region_shared_upstream_bandwidth_update()
1038 	/* Handle the bandwidth at the host bridge of the hierarchy */  in cxl_region_shared_upstream_bandwidth_update()
1046 	 * Aggregate all the bandwidth collected per CFMWS (ACPI0017) and  in cxl_region_shared_upstream_bandwidth_update()
1047 	 * update the region bandwidth with the final calculated values.  in cxl_region_shared_upstream_bandwidth_update()
1064 		/* Get total bandwidth and the worst latency for the cxl region */  in cxl_region_perf_data_calculate()