Lines Matching +full:system +full:- +full:control

1 # SPDX-License-Identifier: GPL-2.0-only
26 	  The CXL specification defines a "CXL memory device" sub-class in the
29 	  memory to be mapped into the system address map (Host-managed Device
70 	  (https://www.computeexpresslink.org/spec-landing). The CXL core
72 	  hierarchy to map regions that represent System RAM, or Persistent
84 	  managed via a bridge driver from CXL to the LIBNVDIMM system
95 	  The CXL.mem protocol allows a device to act as a provider of "System
98 	  known as HDM "Host-managed Device Memory".
101 	  memory expansion and control of HDM. See Chapter 9.13 in the CXL 2.0
125 	  control the EDAC memory features configurations of CXL memory
133 	bool "Enable CXL Patrol Scrub Control (Patrol Read)"
137 	  The CXL EDAC scrub control is optional and allows host to
138 	  control the scrub feature configurations of CXL memory expander
142 	  published with memory scrub control attributes as described by
143 	  Documentation/ABI/testing/sysfs-edac-scrub.
155 	  The CXL EDAC ECS control is optional and allows host to
156 	  control the ECS feature configurations of CXL memory expander
160 	  ECS control attributes as described by
161 	  Documentation/ABI/testing/sysfs-edac-ecs.
172 	  The CXL EDAC memory repair control is optional and allows host
173 	  to control the memory repair features (e.g. sparing, PPR)
181 	  repair control attributes as described by
182 	  Documentation/ABI/testing/sysfs-edac-memory-repair.
206 	  system-physical address range. For CXL regions established by
207 	  platform-firmware this option enables memory error handling to
209 	  range. Otherwise, platform-firmware managed CXL is enabled by being
210 	  placed in the system address map and does not need a driver.