Lines Matching +full:0 +full:x31c
11 #define REG_VERSION 0x000
12 #define REG_STATUS 0x100
13 #define REG_STATUS2 0x104
14 #define REG_ENGINES_AVAIL 0x108
15 #define REG_FIFO_SIZES 0x10c
16 #define REG_SEG_SIZE 0x110
17 #define REG_GOPROC 0x120
18 #define REG_ENCR_SEG_CFG 0x200
19 #define REG_ENCR_SEG_SIZE 0x204
20 #define REG_ENCR_SEG_START 0x208
21 #define REG_CNTR0_IV0 0x20c
22 #define REG_CNTR1_IV1 0x210
23 #define REG_CNTR2_IV2 0x214
24 #define REG_CNTR3_IV3 0x218
25 #define REG_CNTR_MASK 0x21C
26 #define REG_ENCR_CCM_INT_CNTR0 0x220
27 #define REG_ENCR_CCM_INT_CNTR1 0x224
28 #define REG_ENCR_CCM_INT_CNTR2 0x228
29 #define REG_ENCR_CCM_INT_CNTR3 0x22c
30 #define REG_ENCR_XTS_DU_SIZE 0x230
31 #define REG_CNTR_MASK2 0x234
32 #define REG_CNTR_MASK1 0x238
33 #define REG_CNTR_MASK0 0x23c
34 #define REG_AUTH_SEG_CFG 0x300
35 #define REG_AUTH_SEG_SIZE 0x304
36 #define REG_AUTH_SEG_START 0x308
37 #define REG_AUTH_IV0 0x310
38 #define REG_AUTH_IV1 0x314
39 #define REG_AUTH_IV2 0x318
40 #define REG_AUTH_IV3 0x31c
41 #define REG_AUTH_IV4 0x320
42 #define REG_AUTH_IV5 0x324
43 #define REG_AUTH_IV6 0x328
44 #define REG_AUTH_IV7 0x32c
45 #define REG_AUTH_IV8 0x330
46 #define REG_AUTH_IV9 0x334
47 #define REG_AUTH_IV10 0x338
48 #define REG_AUTH_IV11 0x33c
49 #define REG_AUTH_IV12 0x340
50 #define REG_AUTH_IV13 0x344
51 #define REG_AUTH_IV14 0x348
52 #define REG_AUTH_IV15 0x34c
53 #define REG_AUTH_INFO_NONCE0 0x350
54 #define REG_AUTH_INFO_NONCE1 0x354
55 #define REG_AUTH_INFO_NONCE2 0x358
56 #define REG_AUTH_INFO_NONCE3 0x35c
57 #define REG_AUTH_BYTECNT0 0x390
58 #define REG_AUTH_BYTECNT1 0x394
59 #define REG_AUTH_BYTECNT2 0x398
60 #define REG_AUTH_BYTECNT3 0x39c
61 #define REG_AUTH_EXP_MAC0 0x3a0
62 #define REG_AUTH_EXP_MAC1 0x3a4
63 #define REG_AUTH_EXP_MAC2 0x3a8
64 #define REG_AUTH_EXP_MAC3 0x3ac
65 #define REG_AUTH_EXP_MAC4 0x3b0
66 #define REG_AUTH_EXP_MAC5 0x3b4
67 #define REG_AUTH_EXP_MAC6 0x3b8
68 #define REG_AUTH_EXP_MAC7 0x3bc
69 #define REG_CONFIG 0x400
70 #define REG_GOPROC_QC_KEY 0x1000
71 #define REG_GOPROC_OEM_KEY 0x2000
72 #define REG_ENCR_KEY0 0x3000
73 #define REG_ENCR_KEY1 0x3004
74 #define REG_ENCR_KEY2 0x3008
75 #define REG_ENCR_KEY3 0x300c
76 #define REG_ENCR_KEY4 0x3010
77 #define REG_ENCR_KEY5 0x3014
78 #define REG_ENCR_KEY6 0x3018
79 #define REG_ENCR_KEY7 0x301c
80 #define REG_ENCR_XTS_KEY0 0x3020
81 #define REG_ENCR_XTS_KEY1 0x3024
82 #define REG_ENCR_XTS_KEY2 0x3028
83 #define REG_ENCR_XTS_KEY3 0x302c
84 #define REG_ENCR_XTS_KEY4 0x3030
85 #define REG_ENCR_XTS_KEY5 0x3034
86 #define REG_ENCR_XTS_KEY6 0x3038
87 #define REG_ENCR_XTS_KEY7 0x303c
88 #define REG_AUTH_KEY0 0x3040
89 #define REG_AUTH_KEY1 0x3044
90 #define REG_AUTH_KEY2 0x3048
91 #define REG_AUTH_KEY3 0x304c
92 #define REG_AUTH_KEY4 0x3050
93 #define REG_AUTH_KEY5 0x3054
94 #define REG_AUTH_KEY6 0x3058
95 #define REG_AUTH_KEY7 0x305c
96 #define REG_AUTH_KEY8 0x3060
97 #define REG_AUTH_KEY9 0x3064
98 #define REG_AUTH_KEY10 0x3068
99 #define REG_AUTH_KEY11 0x306c
100 #define REG_AUTH_KEY12 0x3070
101 #define REG_AUTH_KEY13 0x3074
102 #define REG_AUTH_KEY14 0x3078
103 #define REG_AUTH_KEY15 0x307c
106 #define CORE_STEP_REV_SHIFT 0
107 #define CORE_STEP_REV_MASK GENMASK(15, 0)
137 #define SW_ERR_SHIFT 0
146 #define REQ_SIZE_ENUM_1_BEAT 0
165 #define ENUM_1_QUEUED_REQS 0
180 #define MASK_ERR_INTR_SHIFT 0
184 #define COMP_EXP_MAC_DISABLED 0
188 #define F9_DIRECTION_UPLINK 0
201 #define AUTH_POS_BEFORE 0
206 #define AUTH_SIZE_SHA1 0
208 #define AUTH_SIZE_ENUM_1_BYTES 0
227 #define AUTH_MODE_HASH 0
229 #define AUTH_MODE_CCM 0
234 #define AUTH_KEY_SZ_AES128 0
237 #define AUTH_ALG_SHIFT 0
238 #define AUTH_ALG_MASK GENMASK(2, 0)
239 #define AUTH_ALG_NONE 0
247 #define ENCR_XTS_DU_SIZE_SHIFT 0
248 #define ENCR_XTS_DU_SIZE_MASK GENMASK(19, 0)
252 #define F8_KEYSTREAM_DISABLED 0
256 #define F8_DIRECTION_UPLINK 0
261 #define USE_KEY_REGISTERS 0
264 #define USE_KEY_REG 0
269 #define INTERM_CCM_XFR 0
273 #define CNTR_ALG_NIST 0
279 #define ENCR_MODE_ECB 0
287 #define ENCR_KEY_SZ_DES 0
289 #define ENCR_KEY_SZ_AES128 0
292 #define ENCR_ALG_SHIFT 0
293 #define ENCR_ALG_MASK GENMASK(2, 0)
294 #define ENCR_ALG_NONE 0
302 #define GO_SHIFT 0
307 #define ENCR_AES_SEL_SHIFT 0