1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2012-2014, The Linux Foundation. All rights reserved.
6 #include <crypto/internal/hash.h>
10 #include <crypto/scatterwalk.h>
11 #include <crypto/sha1.h>
12 #include <crypto/sha2.h>
17 #include "regs-v5.h"
21 static inline u32 qce_read(struct qce_device *qce, u32 offset)  in qce_read()
23 	return readl(qce->base + offset);  in qce_read()
26 static inline void qce_write(struct qce_device *qce, u32 offset, u32 val)  in qce_write()
28 	writel(val, qce->base + offset);  in qce_write()
31 static inline void qce_write_array(struct qce_device *qce, u32 offset,  in qce_write_array()
40 static inline void
51 	u32 beats = (qce->burst_size >> 3) - 1;  in qce_config_reg()
52 	u32 pipe_pair = qce->pipe_pair_id;  in qce_config_reg()
74 	for (; n > 0; n--) {  in qce_cpu_to_be32p_array()
93 static inline void qce_crypto_go(struct qce_device *qce, bool result_dump)  in qce_crypto_go()
125 		cfg |= (auth_size - 1) << AUTH_SIZE_SHIFT;  in qce_auth_cfg()
150 	struct crypto_ahash *ahash = __crypto_ahash_cast(async_req->tfm);  in qce_setup_regs_ahash()
152 	struct qce_alg_template *tmpl = to_ahash_tmpl(async_req->tfm);  in qce_setup_regs_ahash()
153 	struct qce_device *qce = tmpl->qce;  in qce_setup_regs_ahash()
155 	unsigned int blocksize = crypto_tfm_alg_blocksize(async_req->tfm);  in qce_setup_regs_ahash()
162 	if (!rctx->last_blk && req->nbytes % blocksize)  in qce_setup_regs_ahash()
163 		return -EINVAL;  in qce_setup_regs_ahash()
167 	if (IS_CMAC(rctx->flags)) {  in qce_setup_regs_ahash()
175 		auth_cfg = qce_auth_cfg(rctx->flags, rctx->authklen, digestsize);  in qce_setup_regs_ahash()
178 	if (IS_SHA_HMAC(rctx->flags) || IS_CMAC(rctx->flags)) {  in qce_setup_regs_ahash()
179 		u32 authkey_words = rctx->authklen / sizeof(u32);  in qce_setup_regs_ahash()
181 		qce_cpu_to_be32p_array(mackey, rctx->authkey, rctx->authklen);  in qce_setup_regs_ahash()
186 	if (IS_CMAC(rctx->flags))  in qce_setup_regs_ahash()
189 	if (rctx->first_blk)  in qce_setup_regs_ahash()
190 		memcpy(auth, rctx->digest, digestsize);  in qce_setup_regs_ahash()
192 		qce_cpu_to_be32p_array(auth, rctx->digest, digestsize);  in qce_setup_regs_ahash()
194 	iv_words = (IS_SHA1(rctx->flags) || IS_SHA1_HMAC(rctx->flags)) ? 5 : 8;  in qce_setup_regs_ahash()
197 	if (rctx->first_blk)  in qce_setup_regs_ahash()
201 				(u32 *)rctx->byte_count, 2);  in qce_setup_regs_ahash()
203 	auth_cfg = qce_auth_cfg(rctx->flags, 0, digestsize);  in qce_setup_regs_ahash()
205 	if (rctx->last_blk)  in qce_setup_regs_ahash()
210 	if (rctx->first_blk)  in qce_setup_regs_ahash()
217 	qce_write(qce, REG_AUTH_SEG_SIZE, req->nbytes);  in qce_setup_regs_ahash()
220 	qce_write(qce, REG_SEG_SIZE, req->nbytes);  in qce_setup_regs_ahash()
291 	for (i = (QCE_AES_IV_LENGTH - ivsize), j = ivsize - 1;  in qce_xts_swapiv()
292 	     i < QCE_AES_IV_LENGTH; i++, j--)  in qce_xts_swapiv()
309 	 * crypto engine to return back incorrect results.  in qce_xtskey()
318 	struct qce_cipher_ctx *ctx = crypto_tfm_ctx(async_req->tfm);  in qce_setup_regs_skcipher()
320 	struct qce_device *qce = tmpl->qce;  in qce_setup_regs_skcipher()
326 	unsigned int ivsize = rctx->ivsize;  in qce_setup_regs_skcipher()
327 	unsigned long flags = rctx->flags;  in qce_setup_regs_skcipher()
332 		keylen = ctx->enc_keylen / 2;  in qce_setup_regs_skcipher()
334 		keylen = ctx->enc_keylen;  in qce_setup_regs_skcipher()
336 	qce_cpu_to_be32p_array(enckey, ctx->enc_key, keylen);  in qce_setup_regs_skcipher()
351 			qce_xtskey(qce, ctx->enc_key, ctx->enc_keylen,  in qce_setup_regs_skcipher()
352 				   rctx->cryptlen);  in qce_setup_regs_skcipher()
355 		return -EINVAL;  in qce_setup_regs_skcipher()
362 			qce_xts_swapiv(enciv, rctx->iv, ivsize);  in qce_setup_regs_skcipher()
364 			qce_cpu_to_be32p_array(enciv, rctx->iv, ivsize);  in qce_setup_regs_skcipher()
373 	qce_write(qce, REG_ENCR_SEG_SIZE, rctx->cryptlen);  in qce_setup_regs_skcipher()
383 	qce_write(qce, REG_SEG_SIZE, rctx->cryptlen);  in qce_setup_regs_skcipher()
412 	for (; n > 0; n--) {  in qce_be32_to_cpu_array()
424 	struct qce_aead_ctx *ctx = crypto_tfm_ctx(async_req->tfm);  in qce_setup_regs_aead()
426 	struct qce_device *qce = tmpl->qce;  in qce_setup_regs_aead()
432 	unsigned int enc_keylen = ctx->enc_keylen;  in qce_setup_regs_aead()
433 	unsigned int auth_keylen = ctx->auth_keylen;  in qce_setup_regs_aead()
434 	unsigned int enc_ivsize = rctx->ivsize;  in qce_setup_regs_aead()
438 	unsigned long flags = rctx->flags;  in qce_setup_regs_aead()
445 	enckey_words = qce_be32_to_cpu_array(enckey, ctx->enc_key, enc_keylen);  in qce_setup_regs_aead()
449 	enciv_words = qce_be32_to_cpu_array(enciv, rctx->iv, enc_ivsize);  in qce_setup_regs_aead()
452 	if (IS_CCM(rctx->flags)) {  in qce_setup_regs_aead()
453 		iv_last_word = enciv[enciv_words - 1];  in qce_setup_regs_aead()
470 	authkey_words = qce_be32_to_cpu_array(authkey, ctx->auth_key, auth_keylen);  in qce_setup_regs_aead()
474 	if (IS_SHA_HMAC(rctx->flags)) {  in qce_setup_regs_aead()
476 		if (IS_SHA1_HMAC(rctx->flags)) {  in qce_setup_regs_aead()
479 		} else if (IS_SHA256_HMAC(rctx->flags)) {  in qce_setup_regs_aead()
485 	} else if (IS_CCM(rctx->flags)) {  in qce_setup_regs_aead()
487 		authnonce_words = qce_be32_to_cpu_array(authnonce, rctx->ccm_nonce, QCE_MAX_NONCE);  in qce_setup_regs_aead()
498 	auth_cfg = qce_auth_cfg(rctx->flags, auth_keylen, ctx->authsize);  in qce_setup_regs_aead()
502 		if (IS_CCM(rctx->flags))  in qce_setup_regs_aead()
507 		if (IS_CCM(rctx->flags))  in qce_setup_regs_aead()
514 	totallen = rctx->cryptlen + rctx->assoclen;  in qce_setup_regs_aead()
517 	if (IS_CCM(rctx->flags) && IS_DECRYPT(rctx->flags))  in qce_setup_regs_aead()
518 		qce_write(qce, REG_ENCR_SEG_SIZE, rctx->cryptlen + ctx->authsize);  in qce_setup_regs_aead()
520 		qce_write(qce, REG_ENCR_SEG_SIZE, rctx->cryptlen);  in qce_setup_regs_aead()
521 	qce_write(qce, REG_ENCR_SEG_START, rctx->assoclen & 0xffff);  in qce_setup_regs_aead()
528 	if (IS_CCM(rctx->flags) && IS_DECRYPT(rctx->flags))  in qce_setup_regs_aead()
529 		qce_write(qce, REG_SEG_SIZE, totallen + ctx->authsize);  in qce_setup_regs_aead()
560 		return -EINVAL;  in qce_start()
580 		ret = -ENXIO;  in qce_check_status()
582 		ret = -EBADMSG;  in qce_check_status()