Lines Matching +full:num +full:- +full:rx +full:- +full:queues

1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3  * Copyright 2013-2016 Freescale Semiconductor Inc.
4  * Copyright 2017-2018 NXP
21  * Maximum number of Tx/Rx queues per DPSECI object
26  * All queues considered; see dpseci_set_rx_queue()
28 #define DPSECI_ALL_QUEUES	(u8)(-1)
41  * struct dpseci_cfg - Structure representing DPSECI configuration
44  * @num_tx_queues: num of queues towards the SEC
45  * @num_rx_queues: num of queues back from the SEC
49  *		valid priorities are configured with values 1-8;
68  * struct dpseci_attr - Structure representing DPSECI attributes
70  * @num_tx_queues: number of queues towards the SEC
71  * @num_rx_queues: number of queues back from the SEC
86  * enum dpseci_dest - DPSECI destination types
89  *	from the queue based on polling or other user-defined method
104  * struct dpseci_dest_cfg - Structure representing DPSECI destination parameters
108  *	are 0-1 or 0-7, depending on the number of priorities in that channel;
137  * struct dpseci_rx_queue_cfg - DPSECI RX queue configuration
140  * @order_preservation_en: order preservation configuration for the rx queue
159  * struct dpseci_rx_queue_attr - Structure representing attributes of Rx queues
178  * struct dpseci_tx_queue_attr - Structure representing attributes of Tx queues
191  * struct dpseci_sec_attr - Structure representing attributes of the SEC
203  * @snow_f8_acc_num: The number of copies of the SNOW-f8 module that are
205  * @snow_f9_acc_num: The number of copies of the SNOW-f9 module that are
257  * enum dpseci_congestion_unit - DPSECI congestion units
300  * to the sw-portal's DQRR, the DQRI interrupt is asserted immediately
306  * struct dpseci_congestion_notification_cfg - congestion notification
313  * @message_iova: I/O virtual address (must be in DMA-able memory),