150 	struct atmel_sha_dma	dma_lch_in;  member
647 	dd->dma_lch_in.dma_conf.src_maxburst = 16;  in atmel_sha_xmit_dma()
648 	dd->dma_lch_in.dma_conf.dst_maxburst = 16;  in atmel_sha_xmit_dma()
650 	dmaengine_slave_config(dd->dma_lch_in.chan, &dd->dma_lch_in.dma_conf);  in atmel_sha_xmit_dma()
658 		in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, sg, 2,  in atmel_sha_xmit_dma()
664 		in_desc = dmaengine_prep_slave_sg(dd->dma_lch_in.chan, sg, 1,  in atmel_sha_xmit_dma()
687 	dma_async_issue_pending(dd->dma_lch_in.chan);  in atmel_sha_xmit_dma()
1391 	struct atmel_sha_dma *dma = &dd->dma_lch_in;  in atmel_sha_dma_check_aligned()
1425 	struct atmel_sha_dma *dma = &dd->dma_lch_in;  in atmel_sha_dma_callback2()
1445 	struct atmel_sha_dma *dma = &dd->dma_lch_in;  in atmel_sha_dma_start()
2499 	dd->dma_lch_in.chan = dma_request_chan(dd->dev, "tx");  in atmel_sha_dma_init()
2500 	if (IS_ERR(dd->dma_lch_in.chan)) {  in atmel_sha_dma_init()
2501 		return dev_err_probe(dd->dev, PTR_ERR(dd->dma_lch_in.chan),  in atmel_sha_dma_init()
2505 	dd->dma_lch_in.dma_conf.dst_addr = dd->phys_base +  in atmel_sha_dma_init()
2507 	dd->dma_lch_in.dma_conf.src_maxburst = 1;  in atmel_sha_dma_init()
2508 	dd->dma_lch_in.dma_conf.src_addr_width =  in atmel_sha_dma_init()
2510 	dd->dma_lch_in.dma_conf.dst_maxburst = 1;  in atmel_sha_dma_init()
2511 	dd->dma_lch_in.dma_conf.dst_addr_width =  in atmel_sha_dma_init()
2513 	dd->dma_lch_in.dma_conf.device_fc = false;  in atmel_sha_dma_init()
2520 	dma_release_channel(dd->dma_lch_in.chan);  in atmel_sha_dma_cleanup()
2645 				dma_chan_name(sha_dd->dma_lch_in.chan));  in atmel_sha_probe()