Lines Matching +full:omap +full:- +full:sub +full:- +full:mailbox
1 # SPDX-License-Identifier: GPL-2.0-only
39 called padlock-aes.
53 called padlock-sha.
61 Say 'Y' here to use the AMD Geode LX processor on-board AES
65 will be called geode-aes.
87 - A pkey base and API kernel module (pkey.ko) which offers the
89 and the sysfs API and the in-kernel API to the crypto cipher
91 - A pkey pckmo kernel module (pkey-pckmo.ko) which is automatically
94 - A pkey CCA kernel module (pkey-cca.ko) which is automatically
96 - A pkey EP11 kernel module (pkey-ep11.ko) which is automatically
98 - A pkey UV kernel module (pkey-uv.ko) which is automatically
198 and uses triple-DES to generate secure random numbers like the
199 ANSI X9.17 standard. User-space programs access the
200 pseudo-random-number device through the char device /dev/prandom.
300 This option provides the kernel-side support for the TRNG hardware
304 tristate "Support for OMAP crypto HW accelerators"
307 OMAP processors have various crypto HW accelerators. Select this if
308 you want to use the OMAP modules for any of the crypto algorithms.
313 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
322 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
323 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
326 tristate "Support for OMAP AES hw engine"
336 OMAP processors have AES module accelerator. Select this if you
337 want to use the OMAP module for AES algorithms.
340 tristate "Support for OMAP DES/3DES hw engine"
346 OMAP processors have DES/3DES module accelerator. Select this if you
347 want to use the OMAP module for DES and 3DES algorithms. Currently
370 This driver provides kernel-side support through the
375 module will be called exynos-rng.
400 needed for small and zero-size messages.
441 will be called atmel-aes.
454 will be called atmel-tdes.
467 will be called atmel-sha.
485 will be called atmel-ecc.
500 will be called atmel-sha204a.
524 co-processor on the die.
527 will be called mxs-dcp.
572 (default), hashes-only, or skciphers-only.
575 multiple crypto requests. While the ipq40xx chips have 4-core CPUs, the
579 algorithms, sharing the load with the CPU. Enabling skciphers-only
589 - AES (CBC, CTR, ECB, XTS)
590 - 3DES (CBC, ECB)
591 - DES (CBC, ECB)
592 - SHA1, HMAC-SHA1
593 - SHA256, HMAC-SHA256
596 bool "Symmetric-key ciphers only"
599 Enable symmetric-key ciphers only:
600 - AES (CBC, CTR, ECB, XTS)
601 - 3DES (ECB, CBC)
602 - DES (ECB, CBC)
609 - SHA1, HMAC-SHA1
610 - SHA256, HMAC-SHA256
617 - authenc()
618 - ccm(aes)
619 - rfc4309(ccm(aes))
632 Considering the 256-bit ciphers, software is 2-3 times faster than
633 qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
634 With 128-bit keys, the break-even point would be around 1024-bytes.
637 cost in CPU usage. The minimum recommended setting is 16-bytes
638 (1 AES block), since AES-GCM will fail if you set it lower.
641 Note that 192-bit keys are not supported by the hardware and are
655 module will be called qcom-rng. If unsure, say N.
722 Xilinx ZynqMP has AES-GCM engine used for symmetric key
744 depends on MAILBOX
775 This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
779 Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
782 tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
795 Enables the driver for the on-chip crypto accelerator
852 source "drivers/crypto/inside-secure/eip93/Kconfig"