Lines Matching +full:cryptocell +full:- +full:712 +full:- +full:ree

1 # SPDX-License-Identifier: GPL-2.0-only
39 	  called padlock-aes.
53 	  called padlock-sha.
61 	  Say 'Y' here to use the AMD Geode LX processor on-board AES
65 	  will be called geode-aes.
87 	  - A pkey base and API kernel module (pkey.ko) which offers the
89 	    and the sysfs API and the in-kernel API to the crypto cipher
91 	  - A pkey pckmo kernel module (pkey-pckmo.ko) which is automatically
94 	  - A pkey CCA kernel module (pkey-cca.ko) which is automatically
96 	  - A pkey EP11 kernel module (pkey-ep11.ko) which is automatically
98 	  - A pkey UV kernel module (pkey-uv.ko) which is automatically
202 	  for example to use dm-integrity with secure/protected keys.
211 	  and uses triple-DES to generate secure random numbers like the
212 	  ANSI X9.17 standard. User-space programs access the
213 	  pseudo-random-number device through the char device /dev/prandom.
313 	 This option provides the kernel-side support for the TRNG hardware
383 	  This driver provides kernel-side support through the
388 	  module will be called exynos-rng.
413 	  needed for small and zero-size messages.
454 	  will be called atmel-aes.
467 	  will be called atmel-tdes.
480 	  will be called atmel-sha.
498 	  will be called atmel-ecc.
513 	  will be called atmel-sha204a.
537 	  co-processor on the die.
540 	  will be called mxs-dcp.
585 	  (default), hashes-only, or skciphers-only.
588 	  multiple crypto requests.  While the ipq40xx chips have 4-core CPUs, the
592 	  algorithms, sharing the load with the CPU.  Enabling skciphers-only
602 			- AES (CBC, CTR, ECB, XTS)
603 			- 3DES (CBC, ECB)
604 			- DES (CBC, ECB)
605 			- SHA1, HMAC-SHA1
606 			- SHA256, HMAC-SHA256
609 		bool "Symmetric-key ciphers only"
612 		  Enable symmetric-key ciphers only:
613 			- AES (CBC, CTR, ECB, XTS)
614 			- 3DES (ECB, CBC)
615 			- DES (ECB, CBC)
622 			- SHA1, HMAC-SHA1
623 			- SHA256, HMAC-SHA256
630 			- authenc()
631 			- ccm(aes)
632 			- rfc4309(ccm(aes))
645 	  Considering the 256-bit ciphers, software is 2-3 times faster than
646 	  qce at 256-bytes, 30% faster at 512, and about even at 768-bytes.
647 	  With 128-bit keys, the break-even point would be around 1024-bytes.
650 	  cost in CPU usage.  The minimum recommended setting is 16-bytes
651 	  (1 AES block), since AES-GCM will fail if you set it lower.
654 	  Note that 192-bit keys are not supported by the hardware and are
668 	  module will be called qcom-rng. If unsure, say N.
735 	  Xilinx Versal SoC driver provides kernel-side support for True Random Number
736 	  Generator and Pseudo random Number in CTR_DRBG mode as defined in NIST SP800-90A.
739 	  will be called xilinx-trng.
748 	  Xilinx ZynqMP has AES-GCM engine used for symmetric key
801 	  This driver interfaces with the SafeXcel EIP-97 and EIP-197 cryptographic
805 	  Additionally, it accelerates combined AES-CBC/HMAC-SHA AEAD operations.
808 	tristate "Support for Axis ARTPEC-6/7 hardware crypto acceleration."
821 	  Enables the driver for the on-chip crypto accelerator
827 	tristate "Support for ARM TrustZone CryptoCell family of security processors"
848 	  Say 'Y' to enable a driver for the REE interface of the Arm
849 	  TrustZone CryptoCell family of processors. Currently the
850 	  CryptoCell 713, 703, 712, 710 and 630 are supported.
852 	  cryptographic operations on the system REE.
879 source "drivers/crypto/inside-secure/eip93/Kconfig"