1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/dma-mapping.h>
12 #include <soc/tegra/bpmp.h>
13 #include <soc/tegra/bpmp-abi.h>
28 	/* CPU0 - A57 Cluster */
33 	/* CPU1 - Denver Cluster */
38 	/* CPU2 - Denver Cluster */
43 	/* CPU3 - A57 Cluster */
48 	/* CPU4 - A57 Cluster */
53 	/* CPU5 - A57 Cluster */
75 	unsigned int cluster = data->cpus[policy->cpu].bpmp_cluster_id;  in tegra186_cpufreq_init()
76 	u32 cpu;  in tegra186_cpufreq_init()  local
78 	policy->freq_table = data->clusters[cluster].table;  in tegra186_cpufreq_init()
79 	policy->cpuinfo.transition_latency = 300 * 1000;  in tegra186_cpufreq_init()
80 	policy->driver_data = NULL;  in tegra186_cpufreq_init()
83 	for (cpu = 0; cpu < ARRAY_SIZE(tegra186_cpus); cpu++) {  in tegra186_cpufreq_init()
84 		if (data->cpus[cpu].bpmp_cluster_id == cluster)  in tegra186_cpufreq_init()
85 			cpumask_set_cpu(cpu, policy->cpus);  in tegra186_cpufreq_init()
95 	struct cpufreq_frequency_table *tbl = policy->freq_table + index;  in tegra186_cpufreq_set_target()
97 	u32 edvd_val = tbl->driver_data;  in tegra186_cpufreq_set_target()
98 	u32 cpu;  in tegra186_cpufreq_set_target()  local
100 	for_each_cpu(cpu, policy->cpus) {  in tegra186_cpufreq_set_target()
101 		edvd_offset = data->cpus[cpu].edvd_offset;  in tegra186_cpufreq_set_target()
102 		writel(edvd_val, data->regs + edvd_offset);  in tegra186_cpufreq_set_target()
108 static unsigned int tegra186_cpufreq_get(unsigned int cpu)  in tegra186_cpufreq_get()  argument
110 	struct cpufreq_policy *policy __free(put_cpufreq_policy) = cpufreq_cpu_get(cpu);  in tegra186_cpufreq_get()
119 	edvd_offset = data->cpus[policy->cpu].edvd_offset;  in tegra186_cpufreq_get()
120 	ndiv = readl(data->regs + edvd_offset) & EDVD_CORE_VOLT_FREQ_F_MASK;  in tegra186_cpufreq_get()
121 	cluster_id = data->cpus[policy->cpu].bpmp_cluster_id;  in tegra186_cpufreq_get()
122 	cluster = &data->clusters[cluster_id];  in tegra186_cpufreq_get()
124 	return (cluster->ref_clk_khz * ndiv) / cluster->div;  in tegra186_cpufreq_get()
138 	struct platform_device *pdev, struct tegra_bpmp *bpmp,  in init_vhint_table()  argument
150 	virt = dma_alloc_coherent(bpmp->dev, sizeof(*data), &phys,  in init_vhint_table()
153 		return ERR_PTR(-ENOMEM);  in init_vhint_table()
163 	msg.tx.data = &req;  in init_vhint_table()
164 	msg.tx.size = sizeof(req);  in init_vhint_table()
166 	err = tegra_bpmp_transfer(bpmp, &msg);  in init_vhint_table()
172 		table = ERR_PTR(-EINVAL);  in init_vhint_table()
177 	for (i = data->vfloor; i <= data->vceil; i++) {  in init_vhint_table()
178 		u16 ndiv = data->ndiv[i];  in init_vhint_table()
180 		if (ndiv < data->ndiv_min || ndiv > data->ndiv_max)  in init_vhint_table()
184 		if (i > 0 && ndiv == data->ndiv[i - 1])  in init_vhint_table()
190 	table = devm_kcalloc(&pdev->dev, *num_rates + 1, sizeof(*table),  in init_vhint_table()
193 		table = ERR_PTR(-ENOMEM);  in init_vhint_table()
197 	cluster->ref_clk_khz = data->ref_clk_hz / 1000;  in init_vhint_table()
198 	cluster->div = data->pdiv * data->mdiv;  in init_vhint_table()
200 	for (i = data->vfloor, j = 0; i <= data->vceil; i++) {  in init_vhint_table()
202 		u16 ndiv = data->ndiv[i];  in init_vhint_table()
205 		if (ndiv < data->ndiv_min || ndiv > data->ndiv_max)  in init_vhint_table()
209 		if (i > 0 && ndiv == data->ndiv[i - 1])  in init_vhint_table()
216 		point->driver_data = edvd_val;  in init_vhint_table()
217 		point->frequency = (cluster->ref_clk_khz * ndiv) / cluster->div;  in init_vhint_table()
223 	dma_free_coherent(bpmp->dev, sizeof(*data), virt, phys);  in init_vhint_table()
231 	struct tegra_bpmp *bpmp;  in tegra186_cpufreq_probe()  local
234 	u32 edvd_val, cpu;  in tegra186_cpufreq_probe()  local
236 	data = devm_kzalloc(&pdev->dev,  in tegra186_cpufreq_probe()
240 		return -ENOMEM;  in tegra186_cpufreq_probe()
242 	data->cpus = tegra186_cpus;  in tegra186_cpufreq_probe()
244 	bpmp = tegra_bpmp_get(&pdev->dev);  in tegra186_cpufreq_probe()
245 	if (IS_ERR(bpmp))  in tegra186_cpufreq_probe()
246 		return PTR_ERR(bpmp);  in tegra186_cpufreq_probe()
248 	data->regs = devm_platform_ioremap_resource(pdev, 0);  in tegra186_cpufreq_probe()
249 	if (IS_ERR(data->regs)) {  in tegra186_cpufreq_probe()
250 		err = PTR_ERR(data->regs);  in tegra186_cpufreq_probe()
255 		struct tegra186_cpufreq_cluster *cluster = &data->clusters[i];  in tegra186_cpufreq_probe()
257 		cluster->table = init_vhint_table(pdev, bpmp, cluster, i, &num_rates);  in tegra186_cpufreq_probe()
258 		if (IS_ERR(cluster->table)) {  in tegra186_cpufreq_probe()
259 			err = PTR_ERR(cluster->table);  in tegra186_cpufreq_probe()
262 			err = -EINVAL;  in tegra186_cpufreq_probe()
266 		for (cpu = 0; cpu < ARRAY_SIZE(tegra186_cpus); cpu++) {  in tegra186_cpufreq_probe()
267 			if (data->cpus[cpu].bpmp_cluster_id == i) {  in tegra186_cpufreq_probe()
268 				edvd_val = cluster->table[num_rates - 1].driver_data;  in tegra186_cpufreq_probe()
269 				edvd_offset = data->cpus[cpu].edvd_offset;  in tegra186_cpufreq_probe()
270 				writel(edvd_val, data->regs + edvd_offset);  in tegra186_cpufreq_probe()
280 	tegra_bpmp_put(bpmp);  in tegra186_cpufreq_probe()
291 	{ .compatible = "nvidia,tegra186-ccplex-cluster", },
298 		.name = "tegra186-cpufreq",