1 // SPDX-License-Identifier: GPL-2.0
74 	priv->fdvfs = devm_of_iomap(priv->dev, priv->dev->of_node, 0, NULL);  in mtk_cpufreq_hw_mt8196_init()
75 	if (IS_ERR(priv->fdvfs))  in mtk_cpufreq_hw_mt8196_init()
76 		return dev_err_probe(priv->dev, PTR_ERR(priv->fdvfs),  in mtk_cpufreq_hw_mt8196_init()
103 	policy = cpufreq_cpu_get_raw(cpu_dev->id);  in mtk_cpufreq_get_cpu_power()
105 		return -EINVAL;  in mtk_cpufreq_get_cpu_power()
107 	data = policy->driver_data;  in mtk_cpufreq_get_cpu_power()
109 	for (i = 0; i < data->nr_opp; i++) {  in mtk_cpufreq_get_cpu_power()
110 		if (data->table[i].frequency < *KHz)  in mtk_cpufreq_get_cpu_power()
113 	i--;  in mtk_cpufreq_get_cpu_power()
115 	*KHz = data->table[i].frequency;  in mtk_cpufreq_get_cpu_power()
116 	/* Provide micro-Watts value to the Energy Model */  in mtk_cpufreq_get_cpu_power()
117 	*uW = readl_relaxed(data->reg_bases[REG_EM_POWER_TBL] +  in mtk_cpufreq_get_cpu_power()
126 	struct mtk_cpufreq_domain *data = policy->driver_data;  in mtk_cpufreq_hw_fdvfs_switch()
127 	struct mtk_cpufreq_priv *priv = data->parent;  in mtk_cpufreq_hw_fdvfs_switch()
131 	for_each_cpu(cpu, policy->real_cpus) {  in mtk_cpufreq_hw_fdvfs_switch()
132 		writel_relaxed(target_freq, priv->fdvfs + cpu * 4);  in mtk_cpufreq_hw_fdvfs_switch()
139 	struct mtk_cpufreq_domain *data = policy->driver_data;  in mtk_cpufreq_hw_target_index()
142 	if (data->parent->fdvfs) {  in mtk_cpufreq_hw_target_index()
143 		target_freq = policy->freq_table[index].frequency;  in mtk_cpufreq_hw_target_index()
146 		writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]);  in mtk_cpufreq_hw_target_index()
162 	data = policy->driver_data;  in mtk_cpufreq_hw_get()
164 	index = readl_relaxed(data->reg_bases[REG_FREQ_PERF_STATE]);  in mtk_cpufreq_hw_get()
165 	index = min(index, LUT_MAX_ENTRIES - 1);  in mtk_cpufreq_hw_get()
167 	return data->table[index].frequency;  in mtk_cpufreq_hw_get()
173 	struct mtk_cpufreq_domain *data = policy->driver_data;  in mtk_cpufreq_hw_fast_switch()
178 	if (data->parent->fdvfs)  in mtk_cpufreq_hw_fast_switch()
181 		writel_relaxed(index, data->reg_bases[REG_FREQ_PERF_STATE]);  in mtk_cpufreq_hw_fast_switch()
183 	return policy->freq_table[index].frequency;  in mtk_cpufreq_hw_fast_switch()
189 	struct device *dev = &pdev->dev;  in mtk_cpu_create_freq_table()
190 	u32 temp, i, freq, prev_freq = 0;  in mtk_cpu_create_freq_table()  local
193 	data->table = devm_kcalloc(dev, LUT_MAX_ENTRIES + 1,  in mtk_cpu_create_freq_table()
194 				   sizeof(*data->table), GFP_KERNEL);  in mtk_cpu_create_freq_table()
195 	if (!data->table)  in mtk_cpu_create_freq_table()
196 		return -ENOMEM;  in mtk_cpu_create_freq_table()
198 	base_table = data->reg_bases[REG_FREQ_LUT_TABLE];  in mtk_cpu_create_freq_table()
202 		freq = FIELD_GET(LUT_FREQ, temp) * 1000;  in mtk_cpu_create_freq_table()
204 		if (freq == prev_freq)  in mtk_cpu_create_freq_table()
207 		data->table[i].frequency = freq;  in mtk_cpu_create_freq_table()
209 		dev_dbg(dev, "index=%d freq=%d\n", i, data->table[i].frequency);  in mtk_cpu_create_freq_table()
211 		prev_freq = freq;  in mtk_cpu_create_freq_table()
214 	data->table[i].frequency = CPUFREQ_TABLE_END;  in mtk_cpu_create_freq_table()
215 	data->nr_opp = i;  in mtk_cpu_create_freq_table()
225 	struct device *dev = &pdev->dev;  in mtk_cpu_resources_init()
234 		return -ENOMEM;  in mtk_cpu_resources_init()
236 	ret = of_perf_domain_get_sharing_cpumask(policy->cpu, "performance-domains",  in mtk_cpu_resources_init()
237 						 "#performance-domain-cells",  in mtk_cpu_resources_init()
238 						 policy->cpus, &args);  in mtk_cpu_resources_init()
247 	 * register range is for FDVFS, followed by the frequency domain MMIOs.  in mtk_cpu_resources_init()
249 	if (priv->variant->is_hybrid_dvfs)  in mtk_cpu_resources_init()
252 	data->parent = priv;  in mtk_cpu_resources_init()
257 		return -ENODEV;  in mtk_cpu_resources_init()
260 	if (!request_mem_region(res->start, resource_size(res), res->name)) {  in mtk_cpu_resources_init()
262 		return -EBUSY;  in mtk_cpu_resources_init()
265 	base = ioremap(res->start, resource_size(res));  in mtk_cpu_resources_init()
268 		ret = -ENOMEM;  in mtk_cpu_resources_init()
272 	data->base = base;  in mtk_cpu_resources_init()
273 	data->res = res;  in mtk_cpu_resources_init()
276 		data->reg_bases[i] = base + priv->variant->reg_offsets[i];  in mtk_cpu_resources_init()
280 		dev_info(dev, "Domain-%d failed to create freq table\n", index);  in mtk_cpu_resources_init()
284 	policy->freq_table = data->table;  in mtk_cpu_resources_init()
285 	policy->driver_data = data;  in mtk_cpu_resources_init()
289 	release_mem_region(res->start, resource_size(res));  in mtk_cpu_resources_init()
304 		dev_info(&pdev->dev, "CPUFreq resource init failed\n");  in mtk_cpufreq_hw_cpu_init()
308 	data = policy->driver_data;  in mtk_cpufreq_hw_cpu_init()
310 	latency = readl_relaxed(data->reg_bases[REG_FREQ_LATENCY]) * 1000;  in mtk_cpufreq_hw_cpu_init()
314 	policy->cpuinfo.transition_latency = latency;  in mtk_cpufreq_hw_cpu_init()
315 	policy->fast_switch_possible = true;  in mtk_cpufreq_hw_cpu_init()
318 	writel_relaxed(0x1, data->reg_bases[REG_FREQ_ENABLE]);  in mtk_cpufreq_hw_cpu_init()
319 	if (readl_poll_timeout(data->reg_bases[REG_FREQ_HW_STATE], sig,  in mtk_cpufreq_hw_cpu_init()
324 				policy->cpu);  in mtk_cpufreq_hw_cpu_init()
325 			return -ENODEV;  in mtk_cpufreq_hw_cpu_init()
328 		pr_info("SVS of CPU%d is not enabled\n", policy->cpu);  in mtk_cpufreq_hw_cpu_init()
336 	struct mtk_cpufreq_domain *data = policy->driver_data;  in mtk_cpufreq_hw_cpu_exit()
337 	struct resource *res = data->res;  in mtk_cpufreq_hw_cpu_exit()
338 	void __iomem *base = data->base;  in mtk_cpufreq_hw_cpu_exit()
341 	writel_relaxed(0x0, data->reg_bases[REG_FREQ_ENABLE]);  in mtk_cpufreq_hw_cpu_exit()
343 	release_mem_region(res->start, resource_size(res));  in mtk_cpufreq_hw_cpu_exit()
349 	struct mtk_cpufreq_domain *data = policy->driver_data;  in mtk_cpufreq_register_em()
351 	em_dev_register_perf_domain(get_cpu_device(policy->cpu), data->nr_opp,  in mtk_cpufreq_register_em()
352 				    &em_cb, policy->cpus, true);  in mtk_cpufreq_register_em()
366 	.name		= "mtk-cpufreq-hw",
381 			return dev_err_probe(&pdev->dev, -EPROBE_DEFER,  in mtk_cpufreq_hw_driver_probe()
386 			return dev_err_probe(&pdev->dev, PTR_ERR(cpu_reg),  in mtk_cpufreq_hw_driver_probe()
391 	data = of_device_get_match_data(&pdev->dev);  in mtk_cpufreq_hw_driver_probe()
393 		return -EINVAL;  in mtk_cpufreq_hw_driver_probe()
395 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);  in mtk_cpufreq_hw_driver_probe()
397 		return -ENOMEM;  in mtk_cpufreq_hw_driver_probe()
399 	priv->variant = data;  in mtk_cpufreq_hw_driver_probe()
400 	priv->dev = &pdev->dev;  in mtk_cpufreq_hw_driver_probe()
402 	if (priv->variant->init) {  in mtk_cpufreq_hw_driver_probe()
403 		ret = priv->variant->init(priv);  in mtk_cpufreq_hw_driver_probe()
413 		dev_err(&pdev->dev, "CPUFreq HW driver failed to register\n");  in mtk_cpufreq_hw_driver_probe()
424 	{ .compatible = "mediatek,cpufreq-hw", .data = &cpufreq_mtk_base_variant },
425 	{ .compatible = "mediatek,mt8196-cpufreq-hw", .data = &cpufreq_mtk_mt8196_variant },
434 		.name = "mtk-cpufreq-hw",
441 MODULE_DESCRIPTION("Mediatek cpufreq-hw driver");