3  * J-Core SoC PIT/clocksource driver
62 static int jcore_pit_disable(struct jcore_pit *pit)  in jcore_pit_disable()  argument
64 	writel(0, pit->base + REG_PITEN);  in jcore_pit_disable()
68 static int jcore_pit_set(unsigned long delta, struct jcore_pit *pit)  in jcore_pit_set()  argument
70 	jcore_pit_disable(pit);  in jcore_pit_set()
71 	writel(delta, pit->base + REG_THROT);  in jcore_pit_set()
72 	writel(pit->enable_val, pit->base + REG_PITEN);  in jcore_pit_set()
78 	struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);  in jcore_pit_set_state_shutdown()  local
80 	return jcore_pit_disable(pit);  in jcore_pit_set_state_shutdown()
85 	struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);  in jcore_pit_set_state_oneshot()  local
87 	return jcore_pit_disable(pit);  in jcore_pit_set_state_oneshot()
92 	struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);  in jcore_pit_set_state_periodic()  local
94 	return jcore_pit_set(pit->periodic_delta, pit);  in jcore_pit_set_state_periodic()
100 	struct jcore_pit *pit = container_of(ced, struct jcore_pit, ced);  in jcore_pit_set_next_event()  local
102 	return jcore_pit_set(delta, pit);  in jcore_pit_set_next_event()
107 	struct jcore_pit *pit = this_cpu_ptr(jcore_pit_percpu);  in jcore_pit_local_init()  local
110 	pr_info("Local J-Core PIT init on cpu %u\n", cpu);  in jcore_pit_local_init()
112 	buspd = readl(pit->base + REG_BUSPD);  in jcore_pit_local_init()
114 	pit->periodic_delta = DIV_ROUND_CLOSEST(NSEC_PER_SEC, HZ * buspd);  in jcore_pit_local_init()
116 	clockevents_config_and_register(&pit->ced, freq, 1, ULONG_MAX);  in jcore_pit_local_init()
117 	enable_percpu_irq(pit->ced.irq, IRQ_TYPE_NONE);  in jcore_pit_local_init()
124 	struct jcore_pit *pit = this_cpu_ptr(jcore_pit_percpu);  in jcore_pit_local_teardown()  local
126 	pr_info("Local J-Core PIT teardown on cpu %u\n", cpu);  in jcore_pit_local_teardown()
128 	disable_percpu_irq(pit->ced.irq);  in jcore_pit_local_teardown()
135 	struct jcore_pit *pit = dev_id;  in jcore_timer_interrupt()  local
137 	if (clockevent_state_oneshot(&pit->ced))  in jcore_timer_interrupt()
138 		jcore_pit_disable(pit);  in jcore_timer_interrupt()
140 	pit->ced.event_handler(&pit->ced);  in jcore_timer_interrupt()
154 		pr_err("Error: Cannot map base address for J-Core PIT\n");  in jcore_pit_init()
160 		pr_err("Error: J-Core PIT has no IRQ\n");  in jcore_pit_init()
164 	pr_info("Initializing J-Core PIT at %p IRQ %d\n",  in jcore_pit_init()
187 		pr_err("pit irq request failed: %d\n", err);  in jcore_pit_init()
193 	 * The J-Core PIT is not hard-wired to a particular IRQ, but  in jcore_pit_init()
197 	 * The bit layout of the PIT enable register is:  in jcore_pit_init()
204 	 * For the PIT included in AIC1 (obsolete but still in use),  in jcore_pit_init()
209 	 * For the PIT included in AIC2 (current), the programming  in jcore_pit_init()
228 		struct jcore_pit *pit = per_cpu_ptr(jcore_pit_percpu, cpu);  in jcore_pit_init()  local
230 		pit->base = of_iomap(node, cpu);  in jcore_pit_init()
231 		if (!pit->base) {  in jcore_pit_init()
232 			pr_err("Unable to map PIT for cpu %u\n", cpu);  in jcore_pit_init()
236 		pit->ced.name = "jcore_pit";  in jcore_pit_init()
237 		pit->ced.features = CLOCK_EVT_FEAT_PERIODIC  in jcore_pit_init()
240 		pit->ced.cpumask = cpumask_of(cpu);  in jcore_pit_init()
241 		pit->ced.rating = 400;  in jcore_pit_init()
242 		pit->ced.irq = pit_irq;  in jcore_pit_init()
243 		pit->ced.set_state_shutdown = jcore_pit_set_state_shutdown;  in jcore_pit_init()
244 		pit->ced.set_state_periodic = jcore_pit_set_state_periodic;  in jcore_pit_init()
245 		pit->ced.set_state_oneshot = jcore_pit_set_state_oneshot;  in jcore_pit_init()
246 		pit->ced.set_next_event = jcore_pit_set_next_event;  in jcore_pit_init()
248 		pit->enable_val = enable_val;  in jcore_pit_init()
258 TIMER_OF_DECLARE(jcore_pit, "jcore,pit", jcore_pit_init);