1 // SPDX-License-Identifier: GPL-2.0-only
8  * Support for the Synopsys DesignWare APB Timers.
51 	return readl(timer->base + offs);  in apbt_readl()
57 	writel(val, timer->base + offs);  in apbt_writel()
62 	return readl_relaxed(timer->base + offs);  in apbt_readl_relaxed()
68 	writel_relaxed(val, timer->base + offs);  in apbt_writel_relaxed()
80  * dw_apb_clockevent_pause() - stop the clock_event_device from running
82  * @dw_ced:	The APB clock to stop generating events.
86 	disable_irq(dw_ced->timer.irq);  in dw_apb_clockevent_pause()
87 	apbt_disable_int(&dw_ced->timer);  in dw_apb_clockevent_pause()
100 	if (!evt->event_handler) {  in dw_apb_clockevent_irq()
105 	if (dw_ced->eoi)  in dw_apb_clockevent_irq()
106 		dw_ced->eoi(&dw_ced->timer);  in dw_apb_clockevent_irq()
108 	evt->event_handler(evt);  in dw_apb_clockevent_irq()
127 		 cpumask_first(evt->cpumask));  in apbt_shutdown()
129 	ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);  in apbt_shutdown()
131 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_shutdown()
141 		 cpumask_first(evt->cpumask));  in apbt_set_oneshot()
143 	ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);  in apbt_set_oneshot()
147 	 * the next event, therefore emulate the one-shot mode.  in apbt_set_oneshot()
152 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_set_oneshot()
154 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_set_oneshot()
157 	 * DW APB p. 46, load counter with all 1s before starting free  in apbt_set_oneshot()
160 	apbt_writel(&dw_ced->timer, ~0, APBTMR_N_LOAD_COUNT);  in apbt_set_oneshot()
163 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_set_oneshot()
170 	unsigned long period = DIV_ROUND_UP(dw_ced->timer.freq, HZ);  in apbt_set_periodic()
174 		 cpumask_first(evt->cpumask));  in apbt_set_periodic()
176 	ctrl = apbt_readl(&dw_ced->timer, APBTMR_N_CONTROL);  in apbt_set_periodic()
178 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_set_periodic()
180 	 * DW APB p. 46, have to disable timer before load counter,  in apbt_set_periodic()
184 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_set_periodic()
187 	apbt_writel(&dw_ced->timer, period, APBTMR_N_LOAD_COUNT);  in apbt_set_periodic()
189 	apbt_writel(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_set_periodic()
198 		 cpumask_first(evt->cpumask));  in apbt_resume()
200 	apbt_enable_int(&dw_ced->timer);  in apbt_resume()
211 	ctrl = apbt_readl_relaxed(&dw_ced->timer, APBTMR_N_CONTROL);  in apbt_next_event()
213 	apbt_writel_relaxed(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_next_event()
215 	apbt_writel_relaxed(&dw_ced->timer, delta, APBTMR_N_LOAD_COUNT);  in apbt_next_event()
217 	apbt_writel_relaxed(&dw_ced->timer, ctrl, APBTMR_N_CONTROL);  in apbt_next_event()
223  * dw_apb_clockevent_init() - use an APB timer as a clock_event_device
225  * @cpu:	The CPU the events will be targeted at or -1 if CPU affiliation
229  * @base:	I/O base for the timer registers.
242 		       void __iomem *base, int irq, unsigned long freq)  in dw_apb_clockevent_init()  argument
251 	dw_ced->timer.base = base;  in dw_apb_clockevent_init()
252 	dw_ced->timer.irq = irq;  in dw_apb_clockevent_init()
253 	dw_ced->timer.freq = freq;  in dw_apb_clockevent_init()
255 	clockevents_calc_mult_shift(&dw_ced->ced, freq, APBT_MIN_PERIOD);  in dw_apb_clockevent_init()
256 	dw_ced->ced.max_delta_ns = clockevent_delta2ns(0x7fffffff,  in dw_apb_clockevent_init()
257 						       &dw_ced->ced);  in dw_apb_clockevent_init()
258 	dw_ced->ced.max_delta_ticks = 0x7fffffff;  in dw_apb_clockevent_init()
259 	dw_ced->ced.min_delta_ns = clockevent_delta2ns(5000, &dw_ced->ced);  in dw_apb_clockevent_init()
260 	dw_ced->ced.min_delta_ticks = 5000;  in dw_apb_clockevent_init()
261 	dw_ced->ced.cpumask = cpu < 0 ? cpu_possible_mask : cpumask_of(cpu);  in dw_apb_clockevent_init()
262 	dw_ced->ced.features = CLOCK_EVT_FEAT_PERIODIC |  in dw_apb_clockevent_init()
264 	dw_ced->ced.set_state_shutdown = apbt_shutdown;  in dw_apb_clockevent_init()
265 	dw_ced->ced.set_state_periodic = apbt_set_periodic;  in dw_apb_clockevent_init()
266 	dw_ced->ced.set_state_oneshot = apbt_set_oneshot;  in dw_apb_clockevent_init()
267 	dw_ced->ced.set_state_oneshot_stopped = apbt_shutdown;  in dw_apb_clockevent_init()
268 	dw_ced->ced.tick_resume = apbt_resume;  in dw_apb_clockevent_init()
269 	dw_ced->ced.set_next_event = apbt_next_event;  in dw_apb_clockevent_init()
270 	dw_ced->ced.irq = dw_ced->timer.irq;  in dw_apb_clockevent_init()
271 	dw_ced->ced.rating = rating;  in dw_apb_clockevent_init()
272 	dw_ced->ced.name = name;  in dw_apb_clockevent_init()
274 	dw_ced->eoi = apbt_eoi;  in dw_apb_clockevent_init()
277 			  dw_ced->ced.name, &dw_ced->ced);  in dw_apb_clockevent_init()
288  * dw_apb_clockevent_resume() - resume a clock that has been paused.
290  * @dw_ced:	The APB clock to resume.
294 	enable_irq(dw_ced->timer.irq);  in dw_apb_clockevent_resume()
298  * dw_apb_clockevent_stop() - stop the clock_event_device and release the IRQ.
300  * @dw_ced:	The APB clock to stop generating the events.
304 	free_irq(dw_ced->timer.irq, &dw_ced->ced);  in dw_apb_clockevent_stop()
308  * dw_apb_clockevent_register() - register the clock with the generic layer
310  * @dw_ced:	The APB clock to register as a clock_event_device.
314 	apbt_writel(&dw_ced->timer, 0, APBTMR_N_CONTROL);  in dw_apb_clockevent_register()
315 	clockevents_register_device(&dw_ced->ced);  in dw_apb_clockevent_register()
316 	apbt_enable_int(&dw_ced->timer);  in dw_apb_clockevent_register()
320  * dw_apb_clocksource_start() - start the clocksource counting.
333 	u32 ctrl = apbt_readl(&dw_cs->timer, APBTMR_N_CONTROL);  in dw_apb_clocksource_start()
336 	apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL);  in dw_apb_clocksource_start()
337 	apbt_writel(&dw_cs->timer, ~0, APBTMR_N_LOAD_COUNT);  in dw_apb_clocksource_start()
341 	apbt_writel(&dw_cs->timer, ctrl, APBTMR_N_CONTROL);  in dw_apb_clocksource_start()
352 	current_count = apbt_readl_relaxed(&dw_cs->timer,  in __apbt_read_clocksource()
367  * dw_apb_clocksource_init() - use an APB timer as a clocksource.
371  * @base:	The I/O base for the timer registers.
374  * This creates a clocksource using an APB timer but does not yet register it
379 dw_apb_clocksource_init(unsigned rating, const char *name, void __iomem *base,  in dw_apb_clocksource_init()  argument
387 	dw_cs->timer.base = base;  in dw_apb_clocksource_init()
388 	dw_cs->timer.freq = freq;  in dw_apb_clocksource_init()
389 	dw_cs->cs.name = name;  in dw_apb_clocksource_init()
390 	dw_cs->cs.rating = rating;  in dw_apb_clocksource_init()
391 	dw_cs->cs.read = __apbt_read_clocksource;  in dw_apb_clocksource_init()
392 	dw_cs->cs.mask = CLOCKSOURCE_MASK(32);  in dw_apb_clocksource_init()
393 	dw_cs->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;  in dw_apb_clocksource_init()
394 	dw_cs->cs.resume = apbt_restart_clocksource;  in dw_apb_clocksource_init()
400  * dw_apb_clocksource_register() - register the APB clocksource.
406 	clocksource_register_hz(&dw_cs->cs, dw_cs->timer.freq);  in dw_apb_clocksource_register()
410  * dw_apb_clocksource_read() - read the current value of a clocksource.
416 	return (u64)~apbt_readl(&dw_cs->timer, APBTMR_N_CURRENT_VALUE);  in dw_apb_clocksource_read()