37 	clk = of_clk_get(node, 0);  in arc_get_timer_clk()
51 	return 0;  in arc_get_timer_clk()
79 	__mcip_cmd(CMD_GFRC_READ_LO, 0);  in arc_read_gfrc()
82 	__mcip_cmd(CMD_GFRC_READ_HI, 0);  in arc_read_gfrc()
124 #define AUX_RTC_CTRL	0x103
125 #define AUX_RTC_LOW	0x104
126 #define AUX_RTC_HIGH	0x105
227 	write_aux_reg(ARC_REG_TIMER1_CNT, 0);  in arc_cs_setup_timer1()
246 	write_aux_reg(ARC_REG_TIMER0_CNT, 0);	/* start from 0 */  in arc_timer_event_setup()
256 	return 0;  in arc_clkevent_set_next_event()
266 	return 0;  in arc_clkevent_set_periodic()
295 	 * 2. Re-arm interrupt if periodic by writing to IE bit [0]  in timer_irq_handler()
311 	clockevents_config_and_register(evt, arc_timer_freq, 0, ARC_TIMERN_MAX);  in arc_timer_starting_cpu()
312 	enable_percpu_irq(arc_timer_irq, 0);  in arc_timer_starting_cpu()
313 	return 0;  in arc_timer_starting_cpu()
319 	return 0;  in arc_timer_dying_cpu()
330 	arc_timer_irq = irq_of_parse_and_map(node, 0);  in arc_clockevent_setup()
331 	if (arc_timer_irq <= 0) {  in arc_clockevent_setup()
356 	return 0;  in arc_clockevent_setup()
361 	static int init_count = 0;  in arc_of_timer_init()