Lines Matching +full:npcm7xx +full:- +full:clock
1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Clock Source drivers"
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
193 bool "NPCM7xx timer driver" if COMPILE_TEST
198 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
221 32-bit free running decrementing counters.
256 bool "Integrator-AP timer driver" if COMPILE_TEST
259 Enables support for the Integrator-AP timer.
284 available on many OMAP-like platforms.
303 bool "Support for 32-bit TIMERn counters in ARC Cores" if COMPILE_TEST
307 These are legacy 32-bit TIMER0 and TIMER1 counters found on all ARC cores
312 bool "Support for 64-bit counters in ARC HS38 cores" if COMPILE_TEST
316 This enables 2 different 64-bit timers: RTC (for UP) and GFRC (for SMP).
334 power-of-2 divisor of the clock rate. The behaviour can also be
337 The main use of the event stream is wfe-based timeouts of userspace
348 bool "Workaround for Freescale/NXP Erratum A-008585"
354 A-008585 ("ARM generic timer may contain an erroneous
356 fsl,erratum-a008585 property is found in the timer node.
365 161010101. The workaround will be active if the hisilicon,erratum-161010101
369 bool "Workaround for Cortex-A73 erratum 858921"
374 This option enables a workaround applicable to Cortex-A73
387 allwinner,erratum-unknown1 property is found in the timer node.
403 to the kernel and maintained forever. Should its parent clock
406 bounds about how much the parent clock is allowed to decrease or
407 increase wrt the initial clock value.
422 Use ARM global timer clock source as sched_clock.
522 bool "J-Core PIT timer driver" if COMPILE_TEST
528 the integrated PIT in the J-Core synthesizable, open source SoC.
536 the Compare Match Timer (CMT) hardware available in 16/32/48-bit
544 This enables build of a clockevent driver for the Multi-Function
546 This hardware comes with 16-bit timer registers.
562 the 32-bit Timer Unit (TMU) hardware available on a wide range
571 the 48-bit System Timer (STI) hardware available on a SoCs
583 bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST
588 This option enables clock source based on free running
599 bool "Clocksource for PXA or SA-11x0 platform" if COMPILE_TEST
603 This enables OST0 support available on PXA and SA-11x0
654 bool "Timer for the RISC-V platform" if COMPILE_TEST
659 This enables the per-hart timer built into all RISC-V systems, which
661 required for all RISC-V systems.
664 bool "CLINT Timer for the RISC-V platform" if COMPILE_TEST
669 This option enables the CLINT timer for RISC-V systems. The CLINT
670 driver is usually used for NoMMU RISC-V systems.
673 bool "SMP Timer for the C-SKY platform" if COMPILE_TEST
677 Say yes here to enable C-SKY SMP timer driver used for C-SKY SMP
706 programmable 32-bit free running incrementing counters.
748 bool "Clocksource using goldfish-rtc"
752 Support for the timer/counter of goldfish-rtc