Lines Matching +full:vcu +full:- +full:settings
1 // SPDX-License-Identifier: GPL-2.0
3 * Xilinx VCU Init
5 * Copyright (C) 2016 - 2017 Xilinx, Inc.
11 #include <linux/clk-provider.h>
17 #include <linux/mfd/syscon/xlnx-vcu.h>
23 #include <dt-bindings/clock/xlnx-vcu.h>
51 * struct xvcu_device - Xilinx VCU init device structure
55 * @reset_gpio: vcu reset gpio
58 * @pll: handle for the VCU PLL
59 * @pll_post: handle for the VCU PLL post divider
60 * @clk_data: clocks provided by the vcu clock provider
84 * struct xvcu_pll_cfg - Helper data
89 * @lock_dly: Lock circuit configuration settings for lock windowsize
206 * xvcu_read - Read from the VCU register space
207 * @iomem: vcu reg space base address
208 * @offset: vcu reg offset from base
210 * Return: Returns 32bit value from VCU register specified
219 * xvcu_write - Write to the VCU register space
220 * @iomem: vcu reg space base address
221 * @offset: vcu reg offset from base
240 void __iomem *base = pll->reg_base; in xvcu_pll_wait_for_lock()
251 return -ETIMEDOUT; in xvcu_pll_wait_for_lock()
269 return ERR_PTR(-EINVAL); in xvcu_register_pll_post()
281 for (i = 0; i < ARRAY_SIZE(xvcu_pll_cfg) - 1; i++) in xvcu_find_cfg()
290 void __iomem *base = pll->reg_base; in xvcu_pll_set_div()
297 return -EINVAL; in xvcu_pll_set_div()
301 vcu_pll_ctrl |= FIELD_PREP(VCU_PLL_CTRL_FBDIV, cfg->fbdiv); in xvcu_pll_set_div()
304 cfg_val = FIELD_PREP(VCU_PLL_CFG_RES, cfg->res) | in xvcu_pll_set_div()
305 FIELD_PREP(VCU_PLL_CFG_CP, cfg->cp) | in xvcu_pll_set_div()
306 FIELD_PREP(VCU_PLL_CFG_LFHF, cfg->lfhf) | in xvcu_pll_set_div()
307 FIELD_PREP(VCU_PLL_CFG_LOCK_CNT, cfg->lock_cnt) | in xvcu_pll_set_div()
308 FIELD_PREP(VCU_PLL_CFG_LOCK_DLY, cfg->lock_dly); in xvcu_pll_set_div()
320 req->rate = clamp_t(unsigned long, req->rate, pll->fvco_min, in xvcu_pll_determine_rate()
321 pll->fvco_max); in xvcu_pll_determine_rate()
323 feedback_div = DIV_ROUND_CLOSEST_ULL(req->rate, req->best_parent_rate); in xvcu_pll_determine_rate()
326 req->rate = req->best_parent_rate * feedback_div; in xvcu_pll_determine_rate()
335 void __iomem *base = pll->reg_base; in xvcu_pll_recalc_rate()
356 void __iomem *base = pll->reg_base; in xvcu_pll_enable()
372 pr_err("VCU PLL is not locked\n"); in xvcu_pll_enable()
387 void __iomem *base = pll->reg_base; in xvcu_pll_disable()
423 return ERR_PTR(-ENOMEM); in xvcu_register_pll()
425 pll->hw.init = &init; in xvcu_register_pll()
426 pll->reg_base = reg_base; in xvcu_register_pll()
427 pll->fvco_min = FVCO_MIN; in xvcu_register_pll()
428 pll->fvco_max = FVCO_MAX; in xvcu_register_pll()
430 hw = &pll->hw; in xvcu_register_pll()
435 clk_hw_set_rate_range(hw, pll->fvco_min, pll->fvco_max); in xvcu_register_pll()
460 return ERR_PTR(-ENOMEM); in xvcu_clk_hw_register_leaf()
465 return ERR_PTR(-ENOMEM); in xvcu_clk_hw_register_leaf()
475 err = -ENOMEM; in xvcu_clk_hw_register_leaf()
529 struct device *dev = xvcu->dev; in xvcu_register_clock_provider()
534 void __iomem *reg_base = xvcu->vcu_slcr_ba; in xvcu_register_clock_provider()
538 return -ENOMEM; in xvcu_register_clock_provider()
539 data->num = CLK_XVCU_NUM_CLOCKS; in xvcu_register_clock_provider()
540 hws = data->hws; in xvcu_register_clock_provider()
542 xvcu->clk_data = data; in xvcu_register_clock_provider()
545 "vcu_pll", __clk_get_name(xvcu->pll_ref), in xvcu_register_clock_provider()
549 xvcu->pll = hw; in xvcu_register_clock_provider()
551 hw = xvcu_register_pll_post(dev, "vcu_pll_post", xvcu->pll, reg_base); in xvcu_register_clock_provider()
554 xvcu->pll_post = hw; in xvcu_register_clock_provider()
557 parent_data[1].hw = xvcu->pll_post; in xvcu_register_clock_provider()
585 struct clk_hw_onecell_data *data = xvcu->clk_data; in xvcu_unregister_clock_provider()
586 struct clk_hw **hws = data->hws; in xvcu_unregister_clock_provider()
596 if (!IS_ERR_OR_NULL(xvcu->pll_post)) in xvcu_unregister_clock_provider()
597 clk_hw_unregister_fixed_factor(xvcu->pll_post); in xvcu_unregister_clock_provider()
601 * xvcu_probe - Probe existence of the logicoreIP
616 xvcu = devm_kzalloc(&pdev->dev, sizeof(*xvcu), GFP_KERNEL); in xvcu_probe()
618 return -ENOMEM; in xvcu_probe()
620 xvcu->dev = &pdev->dev; in xvcu_probe()
623 dev_err(&pdev->dev, "get vcu_slcr memory resource failed.\n"); in xvcu_probe()
624 return -ENODEV; in xvcu_probe()
627 xvcu->vcu_slcr_ba = devm_ioremap(&pdev->dev, res->start, in xvcu_probe()
629 if (!xvcu->vcu_slcr_ba) { in xvcu_probe()
630 dev_err(&pdev->dev, "vcu_slcr register mapping failed.\n"); in xvcu_probe()
631 return -ENOMEM; in xvcu_probe()
634 xvcu->logicore_reg_ba = in xvcu_probe()
635 syscon_regmap_lookup_by_compatible("xlnx,vcu-settings"); in xvcu_probe()
636 if (IS_ERR(xvcu->logicore_reg_ba)) { in xvcu_probe()
637 dev_info(&pdev->dev, in xvcu_probe()
638 "could not find xlnx,vcu-settings: trying direct register access\n"); in xvcu_probe()
643 dev_err(&pdev->dev, "get logicore memory resource failed.\n"); in xvcu_probe()
644 return -ENODEV; in xvcu_probe()
647 regs = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in xvcu_probe()
649 dev_err(&pdev->dev, "logicore register mapping failed.\n"); in xvcu_probe()
650 return -ENOMEM; in xvcu_probe()
653 xvcu->logicore_reg_ba = in xvcu_probe()
654 devm_regmap_init_mmio(&pdev->dev, regs, in xvcu_probe()
656 if (IS_ERR(xvcu->logicore_reg_ba)) { in xvcu_probe()
657 dev_err(&pdev->dev, "failed to init regmap\n"); in xvcu_probe()
658 return PTR_ERR(xvcu->logicore_reg_ba); in xvcu_probe()
662 xvcu->aclk = devm_clk_get(&pdev->dev, "aclk"); in xvcu_probe()
663 if (IS_ERR(xvcu->aclk)) { in xvcu_probe()
664 dev_err(&pdev->dev, "Could not get aclk clock\n"); in xvcu_probe()
665 return PTR_ERR(xvcu->aclk); in xvcu_probe()
668 xvcu->pll_ref = devm_clk_get(&pdev->dev, "pll_ref"); in xvcu_probe()
669 if (IS_ERR(xvcu->pll_ref)) { in xvcu_probe()
670 dev_err(&pdev->dev, "Could not get pll_ref clock\n"); in xvcu_probe()
671 return PTR_ERR(xvcu->pll_ref); in xvcu_probe()
674 ret = clk_prepare_enable(xvcu->aclk); in xvcu_probe()
676 dev_err(&pdev->dev, "aclk clock enable failed\n"); in xvcu_probe()
681 * Do the Gasket isolation and put the VCU out of reset in xvcu_probe()
683 * Bit 1 : put VCU out of reset in xvcu_probe()
685 xvcu->reset_gpio = devm_gpiod_get_optional(&pdev->dev, "reset", in xvcu_probe()
687 if (IS_ERR(xvcu->reset_gpio)) { in xvcu_probe()
688 ret = PTR_ERR(xvcu->reset_gpio); in xvcu_probe()
689 dev_err_probe(&pdev->dev, ret, "failed to get reset gpio for vcu.\n"); in xvcu_probe()
693 if (xvcu->reset_gpio) { in xvcu_probe()
694 gpiod_set_value(xvcu->reset_gpio, 0); in xvcu_probe()
695 /* min 2 clock cycle of vcu pll_ref, slowest freq is 33.33KHz */ in xvcu_probe()
697 gpiod_set_value(xvcu->reset_gpio, 1); in xvcu_probe()
700 …->dev, "No reset gpio info found in dts for VCU. This may result in incorrect functionality if VCU… in xvcu_probe()
703 regmap_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, VCU_GASKET_VALUE); in xvcu_probe()
707 dev_err(&pdev->dev, "failed to register clock provider\n"); in xvcu_probe()
711 dev_set_drvdata(&pdev->dev, xvcu); in xvcu_probe()
718 clk_disable_unprepare(xvcu->aclk); in xvcu_probe()
723 * xvcu_remove - Insert gasket isolation
738 /* Add the Gasket isolation and put the VCU in reset. */ in xvcu_remove()
739 if (xvcu->reset_gpio) { in xvcu_remove()
740 gpiod_set_value(xvcu->reset_gpio, 0); in xvcu_remove()
741 /* min 2 clock cycle of vcu pll_ref, slowest freq is 33.33KHz */ in xvcu_remove()
743 gpiod_set_value(xvcu->reset_gpio, 1); in xvcu_remove()
746 regmap_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, 0); in xvcu_remove()
748 clk_disable_unprepare(xvcu->aclk); in xvcu_remove()
752 { .compatible = "xlnx,vcu" },
753 { .compatible = "xlnx,vcu-logicoreip-1.0" },
760 .name = "xilinx-vcu",
770 MODULE_DESCRIPTION("Xilinx VCU init Driver");