Lines Matching +full:pll +full:-
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Toshiba Visconti PLL driver
12 #include <linux/clk-provider.h>
17 #include "pll.h"
48 #define PLL_CREATE_FRACMODE(table) (table->dacen << 4 | table->dsmen)
49 #define PLL_CREATE_OSTDIV(table) (table->postdiv2 << 4 | table->postdiv1)
56 static void visconti_pll_get_params(struct visconti_pll *pll,
61 val = readl(pll->pll_base + PLL_FRACMODE_REG);
63 rate_table->dacen = FIELD_GET(PLL0_FRACMODE_DACEN, val);
64 rate_table->dsmen = FIELD_GET(PLL0_FRACMODE_DSMEN, val);
66 rate_table->fracin = readl(pll->pll_base + PLL_FRACIN_REG) & PLL_FRACIN_MASK;
67 rate_table->intin = readl(pll->pll_base + PLL_INTIN_REG) & PLL_INTIN_MASK;
68 rate_table->refdiv = readl(pll->pll_base + PLL_REFDIV_REG) & PLL_REFDIV_MASK;
70 postdiv = readl(pll->pll_base + PLL_POSTDIV_REG);
71 rate_table->postdiv1 = postdiv & PLL_POSTDIV_MASK;
72 rate_table->postdiv2 = (postdiv >> 4) & PLL_POSTDIV_MASK;
75 static const struct visconti_pll_rate_table *visconti_get_pll_settings(struct visconti_pll *pll,
78 const struct visconti_pll_rate_table *rate_table = pll->rate_table;
81 for (i = 0; i < pll->rate_count; i++)
88 static unsigned long visconti_get_pll_rate_from_data(struct visconti_pll *pll,
91 const struct visconti_pll_rate_table *rate_table = pll->rate_table;
94 for (i = 0; i < pll->rate_count; i++)
95 if (memcmp(&rate_table[i].dacen, &rate->dacen,
96 sizeof(*rate) - sizeof(unsigned long)) == 0)
106 struct visconti_pll *pll = to_visconti_pll(hw);
107 const struct visconti_pll_rate_table *rate_table = pll->rate_table;
111 for (i = 0; i < pll->rate_count; i++)
116 return rate_table[i - 1].rate;
122 struct visconti_pll *pll = to_visconti_pll(hw);
126 visconti_pll_get_params(pll, &rate_table);
128 return visconti_get_pll_rate_from_data(pll, &rate_table);
131 static int visconti_pll_set_params(struct visconti_pll *pll,
134 writel(PLL_CREATE_FRACMODE(rate_table), pll->pll_base + PLL_FRACMODE_REG);
135 writel(PLL_CREATE_OSTDIV(rate_table), pll->pll_base + PLL_POSTDIV_REG);
136 writel(rate_table->intin, pll->pll_base + PLL_INTIN_REG);
137 writel(rate_table->fracin, pll->pll_base + PLL_FRACIN_REG);
138 writel(rate_table->refdiv, pll->pll_base + PLL_REFDIV_REG);
146 struct visconti_pll *pll = to_visconti_pll(hw);
149 rate_table = visconti_get_pll_settings(pll, rate);
151 return -EINVAL;
153 return visconti_pll_set_params(pll, rate_table);
158 struct visconti_pll *pll = to_visconti_pll(hw);
161 reg = readl(pll->pll_base + PLL_CTRL_REG);
168 struct visconti_pll *pll = to_visconti_pll(hw);
169 const struct visconti_pll_rate_table *rate_table = pll->rate_table;
176 spin_lock_irqsave(pll->lock, flags);
178 writel(PLL_CONFIG_SEL, pll->pll_base + PLL_CONF_REG);
180 reg = readl(pll->pll_base + PLL_CTRL_REG);
182 writel(reg, pll->pll_base + PLL_CTRL_REG);
184 visconti_pll_set_params(pll, &rate_table[0]);
186 reg = readl(pll->pll_base + PLL_CTRL_REG);
188 writel(reg, pll->pll_base + PLL_CTRL_REG);
192 reg = readl(pll->pll_base + PLL_CTRL_REG);
194 writel(reg, pll->pll_base + PLL_CTRL_REG);
198 reg = readl(pll->pll_base + PLL_CTRL_REG);
200 writel(reg, pll->pll_base + PLL_CTRL_REG);
202 spin_unlock_irqrestore(pll->lock, flags);
209 struct visconti_pll *pll = to_visconti_pll(hw);
216 spin_lock_irqsave(pll->lock, flags);
218 writel(PLL_CONFIG_SEL, pll->pll_base + PLL_CONF_REG);
220 reg = readl(pll->pll_base + PLL_CTRL_REG);
222 writel(reg, pll->pll_base + PLL_CTRL_REG);
224 reg = readl(pll->pll_base + PLL_CTRL_REG);
226 writel(reg, pll->pll_base + PLL_CTRL_REG);
228 spin_unlock_irqrestore(pll->lock, flags);
248 struct visconti_pll *pll;
253 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
254 if (!pll)
255 return ERR_PTR(-ENOMEM);
264 pll->rate_count = len;
265 pll->rate_table = kmemdup_array(rate_table,
266 pll->rate_count, sizeof(*pll->rate_table),
268 WARN(!pll->rate_table, "%s: could not allocate rate table for %s\n", __func__, name);
271 pll->hw.init = &init;
272 pll->pll_base = ctx->reg_base + offset;
273 pll->lock = lock;
274 pll->ctx = ctx;
276 pll_hw_clk = &pll->hw;
277 ret = clk_hw_register(NULL, &pll->hw);
279 pr_err("failed to register pll clock %s : %d\n", name, ret);
280 kfree(pll->rate_table);
281 kfree(pll);
293 ctx->clk_data.hws[id] = hw_clk;
307 list->name,
308 list->parent,
309 list->base_reg,
310 list->rate_table,
313 pr_err("failed to register clock %s\n", list->name);
317 visconti_pll_add_lookup(ctx, clk, list->id);
330 return ERR_PTR(-ENOMEM);
332 ctx->node = np;
333 ctx->reg_base = base;
334 ctx->clk_data.num = nr_plls;
337 ctx->clk_data.hws[i] = ERR_PTR(-ENOENT);