Lines Matching +full:composite +full:- +full:divider +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
3 * OMAP gate clock support
7 * Tero Kristo <t-kristo@ti.com>
10 #include <linux/clk-provider.h>
17 #include "clock.h"
48 * omap36xx_gate_clk_enable_with_hsdiv_restore - enable clocks suffering
74 orig_v = ti_clk_ll_ops->clk_readl(&parent->reg); in omap36xx_gate_clk_enable_with_hsdiv_restore()
78 dummy_v ^= (1 << parent->shift); in omap36xx_gate_clk_enable_with_hsdiv_restore()
79 ti_clk_ll_ops->clk_writel(dummy_v, &parent->reg); in omap36xx_gate_clk_enable_with_hsdiv_restore()
81 /* Write the original divider */ in omap36xx_gate_clk_enable_with_hsdiv_restore()
82 ti_clk_ll_ops->clk_writel(orig_v, &parent->reg); in omap36xx_gate_clk_enable_with_hsdiv_restore()
100 return ERR_PTR(-ENOMEM); in _register_gate()
102 clk_hw->hw.init = &init; in _register_gate()
107 memcpy(&clk_hw->enable_reg, reg, sizeof(*reg)); in _register_gate()
108 clk_hw->enable_bit = bit_idx; in _register_gate()
109 clk_hw->ops = hw_ops; in _register_gate()
111 clk_hw->flags = clk_gate_flags; in _register_gate()
118 clk = of_ti_clk_register_omap_hw(node, &clk_hw->hw, name); in _register_gate()
152 if (of_property_read_bool(node, "ti,set-rate-parent")) in _of_ti_gate_clk_setup()
155 if (of_property_read_bool(node, "ti,set-bit-to-disable")) in _of_ti_gate_clk_setup()
176 if (ti_clk_get_reg_addr(node, 0, &gate->enable_reg)) in _of_ti_composite_gate_clk_setup()
179 gate->enable_bit = gate->enable_reg.bit; in _of_ti_composite_gate_clk_setup()
180 gate->ops = hw_ops; in _of_ti_composite_gate_clk_setup()
182 if (!ti_clk_add_component(node, &gate->hw, CLK_COMPONENT_TYPE_GATE)) in _of_ti_composite_gate_clk_setup()
194 CLK_OF_DECLARE(ti_composite_no_wait_gate_clk, "ti,composite-no-wait-gate-clock",
202 CLK_OF_DECLARE(ti_composite_interface_clk, "ti,composite-interface-clock",
210 CLK_OF_DECLARE(ti_composite_gate_clk, "ti,composite-gate-clock",
218 CLK_OF_DECLARE(ti_clkdm_gate_clk, "ti,clkdm-gate-clock",
226 CLK_OF_DECLARE(ti_hsdiv_gate_clk, "ti,hsdiv-gate-clock",
233 CLK_OF_DECLARE(ti_gate_clk, "ti,gate-clock", of_ti_gate_clk_setup);
239 CLK_OF_DECLARE(ti_wait_gate_clk, "ti,wait-gate-clock",
248 CLK_OF_DECLARE(ti_am35xx_gate_clk, "ti,am35xx-gate-clock",
256 CLK_OF_DECLARE(ti_dss_gate_clk, "ti,dss-gate-clock",